Data SheetAD8057/AD8058–40VOUT = –1V TO + 1V OR +1V TO –1V0.4%G = +2RL = 100Ω/1kΩ0.3%–500.2%) c20MHzdB0.1%(0%–60TION–0.1%TOR IS D5MHz–0.2%–70–0.3%–0.4%–8000.40.81.21.62.02.42.83.23.64.00102030405060 029 026 VTIME (ns)OUT (V p-p) 01064- 01064- Figure 24. Distortion vs. VOUT at 20 MHz, 5 MHz, RL = 150 Ω, VS = ±5.0 V Figure 27. Settling Time 5.0VS = ±2.5V4.5RL = 1kΩINPUT SIGNALG = +1)2.5V4.0ns ( E 3.5OUTPUT RESPONSE500mV/3.0LL TIMDIVFA 2.5D N A 2.0EFALL TIME0VTIM 1.5E ISRISE TIMER 1.00.5 030 020ns/DIV01234 027 01064- VOUT (V p-p) 01064- Figure 25. Rise Time and Fall Time vs. VOUT, G = +1, RL = 1 kΩ, RF = 0 Ω Figure 28. Input Overload Recovery, VS = ±2.5 V 5VS = ±5.0V RL = 1kΩ G = +1)4nsINPUT SIGNAL 5V( E5.0V1V/DIV3LL TIMOUTPUT SIGNAL = 4.0VFA DRISE TIMEN A2ETIMFALL TIMEE IS0VR1 031 001234 028 20ns/DIV 01064- VOUT (V p-p) 01064- Figure 26. Rise Time and Fall Time vs. VOUT, G = +2, RL = 100 Ω, RF = 402 Ω Figure 29. Output Overload Recovery, VS = ±5.0 V Rev. E | Page 9 of 16 Document Outline Features Applications Connection Diagrams General Description Table of Contents Revision History Specifications Absolute Maximum Ratings Maximum Power Dissipations ESD Caution Typical Performance Characteristics Test Circuits Applications Information Driving Capacitive Loads Video Filter Differential Analog-to-Digital Driver Layout Outline Dimensions Ordering Guide