Datasheet OP275 (Analog Devices) - 9

制造商Analog Devices
描述Bipolar/JFET, Audio Dual Op Amp
页数 / 页13 / 9 — OP275. Noise Testing. RFB*. VOUT. VIN. 100. 909. 3.92k. *RFB IS OPTIONAL. …
修订版C
文件格式/大小PDF / 306 Kb
文件语言英语

OP275. Noise Testing. RFB*. VOUT. VIN. 100. 909. 3.92k. *RFB IS OPTIONAL. OP37. Overload or Overdrive Recovery. OUTPUT. 4.42k. 490

OP275 Noise Testing RFB* VOUT VIN 100 909 3.92k *RFB IS OPTIONAL OP37 Overload or Overdrive Recovery OUTPUT 4.42k 490

该数据表的模型线

文件文字版本

OP275 OP275 Noise Testing
prevent phase reversal; however, they will not prevent this effect For audio applications, the noise density is usually the most from occurring in noninverting applications. For these applications, important noise parameter. For characterization, the OP275 is the fix is a simple one and is illustrated in Figure 9. A 3.92 k tested using an Audio Precision, System One. The input signal resistor in series with the noninverting input of the OP275 cures to the Audio Precision must be amplified enough to measure it the problem. accurately. For the OP275, the noise is gained by approximately 1020 using the circuit shown in Figure 7. Any readings on the
RFB*
Audio Precision must then be divided by the gain. In imple- menting this test fixture, good supply bypassing is essential.
VOUT VIN + 100 R

RS L 909

3.92k

2k

*RFB IS OPTIONAL A OP37
Figure 9. Output Voltage Phase Reversal Fix
OP275 OP37 Overload or Overdrive Recovery B OUTPUT 909
 Overload or overdrive recovery time of an operational amplifier
4.42k
 is the time required for the output voltage to recover to a rated
100

909
output voltage from a saturated condition. This recovery time 
490

100
 is important in applications where the amplifier must recover quickly after a large abnormal transient event. The circuit shown Figure 7. Noise Test Fixture in Figure 10 was used to evaluate the OP275’s overload recovery time. The OP275 takes approximately 1.2 ms to recover to VOUT =
Input Overcurrent Protection
+10 V and approximately 1.5 µs to recover to VOUT = –10 V. The maximum input differential voltage that can be applied to the OP275 is determined by a pair of internal Zener diodes
R1 R2 1k

10k
 connected across its inputs. They limit the maximum differential input voltage to ±7.5 V. This is to prevent emitter-base junction
2
breakdown from occurring in the input stage of the OP275 when
1 V
very large differential voltages are applied. However, to preserve
OUT 3 A1 +
the OP275’s low input noise voltage, internal resistances in series
VIN R R S L 4V p-p
with the inputs were not used to limit the current in the clamp
909k

2.43k

@100Hz
diodes. In small signal applications, this is not an issue; however, in applications where large differential voltages can be inadvert-
A1 = 1/2 OP275
ently applied to the device, large transient currents can flow through these diodes. Although these diodes have been designed Figure 10. Overload Recovery Time Test Circuit to carry a current of ±5 mA, external resistors as shown in Figure 8
Measuring Settling Time
should be used in the event that the OP275’s differential voltage The design of OP275 combines a high slew rate and a wide gain were to exceed ±7.5 V. bandwidth product to produce a fast settling (tS < 1 µs) amplifier for 8- and 12-bit applications. The test circuit designed to mea-
1.4k

2
sure the settling time of the OP275 is shown in Figure 11. This

test method has advantages over false-sum node techniques in
6 OP275
that the actual output of the amplifier is measured, instead of an
1.4k

3 +
error voltage at the sum node. Common-mode settling effects are exercised in this circuit in addition to the slew rate and band- width effects measured by the false-sum node method. Of course, a reasonably flat-top pulse is required as the stimulus. Figure 8. Input Overcurrent Protection The output waveform of the OP275 under test is clamped by
Output Voltage Phase Reversal
Schottky diodes and buffered by the JFET source follower. Since the OP275’s input stage combines bipolar transistors for The signal is amplified by a factor of 10 by the OP260 and low noise and p-channel JFETs for high speed performance, the then Schottky-clamped at the output to prevent overloading the output voltage of the OP275 may exhibit phase reversal if either oscilloscope’s input amplifier. The OP41 is configured as a fast of its inputs exceeds its negative common-mode input voltage. integrator, which provides overall dc offset nulling. This might occur in very severe industrial applications where
High Speed Operation
a sensor or system fault might apply very large voltages on the As with most high speed amplifiers, care should be taken with inputs of the OP275. Even though the input voltage range of the supply decoupling, lead dress, and component placement. OP275 is ±10.5 V, an input voltage of approximately –13.5 V will Recommended circuit configurations for inverting and nonin- cause output voltage phase reversal. In inverting amplifier con- verting applications are shown in Figures 12 and 13. figurations, the OP275’s internal 7.5 V input clamping diodes will –8– REV. C REV. C –9– Document Outline FEATURES APPLICATIONS GENERAL DESCRIPTION PIN CONNECTIONS SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS ORDERING GUIDE Typical Performance Characteristics APPLICATIONS Circuit Protection Total Harmonic Distortion Noise Noise Testing Input Overcurrent Protection Output Voltage Phase Reversal Overload or Overdrive Recovery Measuring Settling Time Driving Capacitive Loads High Speed, Low Noise Differential Line Driver A 3-Pole, 40 kHz Low-Pass Filter OP275 SPICE Model OUTLINE DIMENSIONS Revision History