Datasheet LTC1197, LTC1197L, LTC1199, LTC1199L (Analog Devices) - 3
| 制造商 | Analog Devices |
| 描述 | 10-Bit, 500ksps ADCs in MSOP with Auto Shutdown |
| 页数 / 页 | 28 / 3 — RECO E DED OPERATI G CO DITIO S The. denotes the specifications which … |
| 文件格式/大小 | PDF / 317 Kb |
| 文件语言 | 英语 |
RECO E DED OPERATI G CO DITIO S The. denotes the specifications which apply over
该数据表的模型线
- LTC1197CMS8#PBF LTC1197CMS8#PBF LTC1197CMS8#TRPBF LTC1197CMS8#TRPBF LTC1197CS8#PBF LTC1197CS8#PBF LTC1197CS8#TRPBF LTC1197CS8#TRPBF LTC1197IMS8#PBF LTC1197IMS8#PBF LTC1197IMS8#TRPBF LTC1197IMS8#TRPBF LTC1197IS8#PBF LTC1197IS8#PBF LTC1197IS8#TRPBF LTC1197IS8#TRPBF LTC1197LCMS8#PBF LTC1197LCMS8#TRPBF LTC1197LCS8#PBF LTC1197LCS8#TRPBF LTC1197LIMS8#PBF LTC1197LIMS8#TRPBF LTC1197LIS8#PBF LTC1197LIS8#TRPBF
- LTC1197LCMS8#PBF LTC1197LCMS8#TRPBF LTC1197LCS8#PBF LTC1197LCS8#TRPBF LTC1197LIMS8#PBF LTC1197LIMS8#TRPBF LTC1197LIS8#PBF LTC1197LIS8#TRPBF
- LTC1199CMS8#PBF LTC1199CMS8#PBF LTC1199CMS8#TRPBF LTC1199CMS8#TRPBF LTC1199CS8#PBF LTC1199CS8#PBF LTC1199CS8#TRPBF LTC1199CS8#TRPBF LTC1199IMS8#PBF LTC1199IMS8#PBF LTC1199IMS8#TRPBF LTC1199IMS8#TRPBF LTC1199IS8#PBF LTC1199IS8#PBF LTC1199IS8#TRPBF LTC1199IS8#TRPBF LTC1199LCMS8#PBF LTC1199LCMS8#TRPBF LTC1199LCS8#PBF LTC1199LCS8#TRPBF LTC1199LIMS8#PBF LTC1199LIMS8#TRPBF LTC1199LIS8#PBF LTC1199LIS8#TRPBF
文件文字版本
LTC1197/LTC1197L LTC1199/LTC1199L
WW U U U U RECO E DED OPERATI G CO DITIO S The
●
denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25
°
C. LTC1197 LTC1199 SYMBOL PARAMETER CONDITIONS MIN TYP MAX MIN TYP MAX UNITS VCC = 5V Operation
tsuCS Setup Time CS↓ Before First CLK↑ 26 26 ns (See Figures 1, 2) thDI Hold Time DIN After CLK↑ LTC1199 26 ns tsuDI Setup Time DIN Stable Before CLK↑ LTC1199 26 ns tWHCLK CLK High Time fCLK = fCLK(MAX) 40% 40% 1/fCLK tWLCLK CLK Low Time fCLK = fCLK(MAX) 40% 40% 1/fCLK tWHCS CS High Time Between Data Transfer Cycles 32 32 ns tWLCS CS Low Time During Data Transfer 13 15 CLK
LTC1197L LTC1199L SYMBOL PARAMETER CONDITIONS MIN TYP MAX MIN TYP MAX UNITS
VCC Supply Voltage 2.7 4 2.7 4 V
VCC = 2.7V Operation
fCLK Clock Frequency ● 0.01 3.5 0.01 3.5 MHz tCYC Total Cycle Time 14 16 CLK tSMPL Analog Input Sampling Time 1.5 1.5 CLK thCS Hold Time CS Low After Last CLK↑ 40 40 ns tsuCS Setup Time CS↓ Before First CLK↑ 78 78 ns (See Figures 1, 2) thDI Hold Time DIN After CLK↑ LTC1199L 78 ns tsuDI Setup Time DIN Stable Before CLK↑ LTC1199L 78 ns tWHCLK CLK High Time fCLK = fCLK(MAX) 40% 40% 1/fCLK tWLCLK CLK Low Time fCLK = fCLK(MAX) 40% 40% 1/fCLK tWHCS CS High Time Between Data Transfer Cycles 96 96 ns tWLCS CS Low Time During Data Transfer 13 15 CLK
U U W CO VERTER A D ULTIPLEXER CHARACTERISTICS The
●
denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25
°
C. VCC = 5V, VREF = 5V, fCLK = fCLK(MAX) as defined in Recommended Operating Conditions, unless otherwise noted. LTC1197 LTC1199 PARAMETER CONDITIONS MIN TYP MAX MIN TYP MAX UNITS
Offset Error ● ±2 ±2 LSB Linearity Error (Note 3) ● ±1 ±1 LSB Gain Error ● ±4 ±4 LSB No Missing Codes Resolution ● 10 10 Bits Analog Input Range – 0.05V to VCC + 0.05V V Reference Input Range LTC1197, VCC ≤ 6V 0.2 VCC + 0.05V V LTC1197, VCC > 6V 0.2 6 V Analog Input Leakage Current (Note 4) ● ±1 ±1 µA 3
WW U U U U RECO E DED OPERATI G CO DITIO S The
●
denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25
°
C. LTC1197 LTC1199 SYMBOL PARAMETER CONDITIONS MIN TYP MAX MIN TYP MAX UNITS VCC = 5V Operation
tsuCS Setup Time CS↓ Before First CLK↑ 26 26 ns (See Figures 1, 2) thDI Hold Time DIN After CLK↑ LTC1199 26 ns tsuDI Setup Time DIN Stable Before CLK↑ LTC1199 26 ns tWHCLK CLK High Time fCLK = fCLK(MAX) 40% 40% 1/fCLK tWLCLK CLK Low Time fCLK = fCLK(MAX) 40% 40% 1/fCLK tWHCS CS High Time Between Data Transfer Cycles 32 32 ns tWLCS CS Low Time During Data Transfer 13 15 CLK
LTC1197L LTC1199L SYMBOL PARAMETER CONDITIONS MIN TYP MAX MIN TYP MAX UNITS
VCC Supply Voltage 2.7 4 2.7 4 V
VCC = 2.7V Operation
fCLK Clock Frequency ● 0.01 3.5 0.01 3.5 MHz tCYC Total Cycle Time 14 16 CLK tSMPL Analog Input Sampling Time 1.5 1.5 CLK thCS Hold Time CS Low After Last CLK↑ 40 40 ns tsuCS Setup Time CS↓ Before First CLK↑ 78 78 ns (See Figures 1, 2) thDI Hold Time DIN After CLK↑ LTC1199L 78 ns tsuDI Setup Time DIN Stable Before CLK↑ LTC1199L 78 ns tWHCLK CLK High Time fCLK = fCLK(MAX) 40% 40% 1/fCLK tWLCLK CLK Low Time fCLK = fCLK(MAX) 40% 40% 1/fCLK tWHCS CS High Time Between Data Transfer Cycles 96 96 ns tWLCS CS Low Time During Data Transfer 13 15 CLK
U U W CO VERTER A D ULTIPLEXER CHARACTERISTICS The
●
denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25
°
C. VCC = 5V, VREF = 5V, fCLK = fCLK(MAX) as defined in Recommended Operating Conditions, unless otherwise noted. LTC1197 LTC1199 PARAMETER CONDITIONS MIN TYP MAX MIN TYP MAX UNITS
Offset Error ● ±2 ±2 LSB Linearity Error (Note 3) ● ±1 ±1 LSB Gain Error ● ±4 ±4 LSB No Missing Codes Resolution ● 10 10 Bits Analog Input Range – 0.05V to VCC + 0.05V V Reference Input Range LTC1197, VCC ≤ 6V 0.2 VCC + 0.05V V LTC1197, VCC > 6V 0.2 6 V Analog Input Leakage Current (Note 4) ● ±1 ±1 µA 3