Datasheet LTC1278 (Analog Devices) - 5
| 制造商 | Analog Devices |
| 描述 | 12-Bit, 500ksps Sampling A/D Converter with Shutdown |
| 页数 / 页 | 16 / 5 — W U. TI I G CHARACTERISTICS (Note 5). Note 7:. Note 1:. Note 8:. Note 2:. … |
| 文件格式/大小 | PDF / 290 Kb |
| 文件语言 | 英语 |
W U. TI I G CHARACTERISTICS (Note 5). Note 7:. Note 1:. Note 8:. Note 2:. Note 9:. Note 3:. Note 10:. Note 11:. Note 4:. Note 12:. Note 5:
该数据表的模型线
- LTC1278-4CN#PBF LTC1278-4CSW#PBF LTC1278-4CSW#TRPBF LTC1278-4IN#PBF LTC1278-4ISW#PBF LTC1278-4ISW#TRPBF LTC1278-5CSW#PBF LTC1278-5CSW#TRPBF LTC1278-5ISW#PBF LTC1278-5ISW#TRPBF
文件文字版本
LTC1278
W U TI I G CHARACTERISTICS (Note 5)
The ● indicates specifications which apply over the full operating
Note 7:
Integral nonlinearity is defined as the deviation of a code from a temperature range; all other limits and typicals T straight line passing through the actual endpoints of the transfer curve. The A = 25°C. deviation is measured from the center of the quantization band.
Note 1:
Absolute Maximum Ratings are those values beyond which the life of a device may be impaired.
Note 8:
Bipolar offset is the offset voltage measured from – 1/2LSB when the output code flickers between 0000 0000 0000 and 1111 1111 1111.
Note 2:
All voltage values are with respect to ground with DGND and AGND wired together (unless otherwise noted).
Note 9:
Guaranteed by design, not subject to test.
Note 3:
When these pin voltages are taken below V
Note 10:
Recommended operating conditions. SS (ground for unipolar mode) or above VDD, they will be clamped by internal diodes. This product
Note 11:
AIN must not exceed VDD or fall below VSS by more than 50mV for can handle input currents greater than 60mA below VSS (ground for specified accuracy. Therefore the minimum supply voltage for the unipolar unipolar mode) or above VDD without latch-up. mode is 4.95V. The minimum for the bipolar mode is 4.75V, – 2.45V.
Note 4:
When these pin voltages are taken below VSS (ground for unipolar
Note 12:
The falling CONVST edge starts a conversion. If CONVST returns mode), they will be clamped by internal diodes. This product can handle high at a bit decision point during the conversion it can create small errors. input currents greater than 60mA below VSS (ground for unipolar mode) For best performance ensure that CONVST returns high either within 120ns without latch-up. These pins are not clamped to VDD. after conversion start (i.e., before the first bit decision) or after BUSY rises
Note 5:
AVDD = DVDD = VDD = 5V, (VSS = – 5V for bipolar mode), fSAMPLE = (i.e., after the last bit test). See mode 1a and 1b (Figures 12 and 13) timing 400kHz (LTC1278-4), 500kHz (LTC1278-5), tr = tf = 5ns unless otherwise diagrams. specified.
Note 6:
Linearity, offset and full-scale specifications apply for unipolar and bipolar modes.
W U TYPICAL PERFORMANCE CHARACTERISTICS Integral Nonlinearity vs Differential Nonlinearity vs ENOBs and S/(N
+
D) vs Output Code Output Code Input Frequency
1.0 1.0 12 74 fSAMPLE = 500kHz fSAMPLE = 500kHz 11 68 10 62 NYQUIST 0.5 0.5 9 FREQUENCY 56 8 S/(N 7 +D) (dB) 0 0 6 5 INL ERROR (LSB) DNL ERROR (LSB) 4 –0.5 –0.5 3 EFFECTIVE NUMBER OF BITS 2 1 fSAMPLE = 500kHz –1.0 –1.0 0 0 512 1024 1536 2048 2560 3072 3584 4096 0 512 1024 1536 2048 2560 3072 3584 4096 10k 100k 1M 2M CODE CODE INPUT FREQUENCY (Hz) LT1278 G1 LT1278 G4 LT1278 G2 5
W U TI I G CHARACTERISTICS (Note 5)
The ● indicates specifications which apply over the full operating
Note 7:
Integral nonlinearity is defined as the deviation of a code from a temperature range; all other limits and typicals T straight line passing through the actual endpoints of the transfer curve. The A = 25°C. deviation is measured from the center of the quantization band.
Note 1:
Absolute Maximum Ratings are those values beyond which the life of a device may be impaired.
Note 8:
Bipolar offset is the offset voltage measured from – 1/2LSB when the output code flickers between 0000 0000 0000 and 1111 1111 1111.
Note 2:
All voltage values are with respect to ground with DGND and AGND wired together (unless otherwise noted).
Note 9:
Guaranteed by design, not subject to test.
Note 3:
When these pin voltages are taken below V
Note 10:
Recommended operating conditions. SS (ground for unipolar mode) or above VDD, they will be clamped by internal diodes. This product
Note 11:
AIN must not exceed VDD or fall below VSS by more than 50mV for can handle input currents greater than 60mA below VSS (ground for specified accuracy. Therefore the minimum supply voltage for the unipolar unipolar mode) or above VDD without latch-up. mode is 4.95V. The minimum for the bipolar mode is 4.75V, – 2.45V.
Note 4:
When these pin voltages are taken below VSS (ground for unipolar
Note 12:
The falling CONVST edge starts a conversion. If CONVST returns mode), they will be clamped by internal diodes. This product can handle high at a bit decision point during the conversion it can create small errors. input currents greater than 60mA below VSS (ground for unipolar mode) For best performance ensure that CONVST returns high either within 120ns without latch-up. These pins are not clamped to VDD. after conversion start (i.e., before the first bit decision) or after BUSY rises
Note 5:
AVDD = DVDD = VDD = 5V, (VSS = – 5V for bipolar mode), fSAMPLE = (i.e., after the last bit test). See mode 1a and 1b (Figures 12 and 13) timing 400kHz (LTC1278-4), 500kHz (LTC1278-5), tr = tf = 5ns unless otherwise diagrams. specified.
Note 6:
Linearity, offset and full-scale specifications apply for unipolar and bipolar modes.
W U TYPICAL PERFORMANCE CHARACTERISTICS Integral Nonlinearity vs Differential Nonlinearity vs ENOBs and S/(N
+
D) vs Output Code Output Code Input Frequency
1.0 1.0 12 74 fSAMPLE = 500kHz fSAMPLE = 500kHz 11 68 10 62 NYQUIST 0.5 0.5 9 FREQUENCY 56 8 S/(N 7 +D) (dB) 0 0 6 5 INL ERROR (LSB) DNL ERROR (LSB) 4 –0.5 –0.5 3 EFFECTIVE NUMBER OF BITS 2 1 fSAMPLE = 500kHz –1.0 –1.0 0 0 512 1024 1536 2048 2560 3072 3584 4096 0 512 1024 1536 2048 2560 3072 3584 4096 10k 100k 1M 2M CODE CODE INPUT FREQUENCY (Hz) LT1278 G1 LT1278 G4 LT1278 G2 5