Datasheet LTC1283 (Analog Devices) - 4

LTC1283
U DIGITAL A D DC ELECTRICAL CH C ARA TER S I TICS The
●
denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25
°
C. (Note 3) LTC1283/LTC1283A SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
IOZ Hi-Z Output Leakage VOUT = VCC, CS High ● 3 μA VOUT = 0V, CS High ● – 3 μA ISOURCE Output Source Current VOUT = 0V – 4.5 mA ISINK Output Sink Current VOUT = VCC 4.5 mA ICC Positive Supply Current CS High, REF + Open ● 150 350 μA IREF Reference Current VREF = 2.5V ● 250 500 μA I – Negative Supply Current CS High, V – = – 3V ● –1 – 50 μA
Note 1:
Stresses beyond those listed under Absolute Maximum Ratings
Note 6:
Two on-chip diodes are tied to each reference and analog input may cause permanent damage to the device. Exposure to any Absolute which will conduct for reference or analog input voltages one diode drop Maximum Rating condition for extended periods may affect device below V – or one diode drop above VCC. Be careful during testing at low reliability and lifetime. VCC levels, as high level reference or analog inputs can cause this input
Note 2:
All voltage values are with respect to ground with DGND, AGND diode to conduct, especially at elevated temperatures, and cause errors for and REF – wired together (unless otherwise noted). inputs near full scale. This spec allows 50mV forward bias of either diode.
Note 3:
V + – This means that as long as the reference or analog input does not exceed CC = 3V, VREF = 2.5V, VREF = 0V, V – = 0V for unipolar mode and – 3V for bipolar mode, ACLK = 1MHz, SCLK = 0.25MHz unless the supply voltage by more than 50mV, the output code will be correct. otherwise specified.
Note 7:
Channel leakage current is measured after the channel selection.
Note 4:
These specifications apply for both unipolar and bipolar modes. In
Note 8:
To minimize errors caused by noise at the chip select input, the bipolar mode, one LSB is equal to the bipolar input span (2VREF) divided internal circuitry waits for two ACLK falling edges after a chip select falling by 1024. For example, when VREF = 2.5V, 1LSB (bipolar) = 2(2.5V)/1024 = edge is detected before responding to control input signals. Therefore, no 4.88mV. attempt should be made to clock an address in or data out until the
Note 5:
Linearity error is the deviation from ideal of the slope between the minimum chip select setup time has elapsed. two end points of the transfer curve.
W U TYPICAL PERFOR A CE CH C ARA TERISTICS Unadjusted Offset Error Supply Current vs Temperature Reference Current vs Temperature vs Reference Voltage
250 500 0.5 REF+ OPEN VCC = 3V ACLK = 500kHz V ⎪ (LSB) VCC = 3V REF = 2.5V 200 V V CC = CS = 3V REF = 2.5V 400 μA) 0.4 ACLK = 500kHz ( OFFSET CC ⎪Δ 150 300 0.3 μA) ( 100 I REF 200 0.2 SUPPLY CURRENT, I 50 100 0.1 0 0 0 –50 –25 0 25 50 75 100 125 –50 –25 0 25 50 75 100 125 MAGNITUDE OF OFFSET CHANGE, –50 –25 0 25 50 75 100 125 AMBIENT TEMPERATURE (°C) TEMPERATURE (°C) AMBIENT TEMPERATURE (°C) LTC1283 • G01 LTC1283 • G02 LTC1283 • G06 1283fb 4