Datasheet LTC1291 (Analog Devices) - 8
| 制造商 | Analog Devices |
| 描述 | Single Chip 12-Bit Data Acquisition System |
| 页数 / 页 | 20 / 8 — APPLICATI. S I FOR ATIO. Operating Sequence. (Example: Differential … |
| 文件格式/大小 | PDF / 342 Kb |
| 文件语言 | 英语 |
APPLICATI. S I FOR ATIO. Operating Sequence. (Example: Differential Inputs (CH0+, CH1–)). MSB-FIRST DATA (MSBF = 1)
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LTC1291
O U U W U APPLICATI S I FOR ATIO
DATA (DIN/DOUT). Data transfer is initiated by a falling chip the conversion appears MSB-first on the DOUT line. The select (CS) signal. After CS falls, the LTC1291 looks for a conversion result is output, bit by bit, as the conversion is start bit. After the start bit is received, a 4-bit input word performed. At the end of the data exchange, CS should be is shifted into the DIN input which configures the LTC1291 brought high. This resets the LTC1291 in preparation for and starts the conversion. After one null bit, the result of the next data exchange.
Operating Sequence (Example: Differential Inputs (CH0+, CH1–)) MSB-FIRST DATA (MSBF = 1)
tCYC CS DON'T CLK CARE START ODD/ PS SIGN DIN DON'T CARE SGL/ MSBF DIFF HI-Z DOUT B11 B1 B0 FILLED WITH ZEROES tSMPL tCONV
LSB-FIRST DATA (MSBF = 0)
tCYC CS DON’T CLK CARE START ODD/ PS SIGN DIN DON'T CARE SGL/ MSBF DIFF HI-Z B11 D B1 B0 B1 B11 OUT tSMPL tCONV FILLED WITH ZEROES 1291 AI03
Power Shutdown Operating Sequence (Example: Differential Inputs (CH0+, CH1–) and MSB-First Data)
CS SHUTDOWN* NEW CONVERSION BEGINS REQUEST POWER SHUTDOWN CLK START ODD/ PS START ODD/ PS SIGN SIGN DIN DON'T CARE SGL/ MSBF MSBF SGL/ DIFF DIFF HI-Z HI-Z D DATA NOT VALID FILLED WITH OUT B11 B0 ZEROES 1291 AI04 * STOPPING THE CLOCK WILL HELP REDUCE POWER CONSUMPTION CS CAN BE BROUGHT HIGH ONCE DIN HAS BEEN CLOCKED IN 1291fa 8
O U U W U APPLICATI S I FOR ATIO
DATA (DIN/DOUT). Data transfer is initiated by a falling chip the conversion appears MSB-first on the DOUT line. The select (CS) signal. After CS falls, the LTC1291 looks for a conversion result is output, bit by bit, as the conversion is start bit. After the start bit is received, a 4-bit input word performed. At the end of the data exchange, CS should be is shifted into the DIN input which configures the LTC1291 brought high. This resets the LTC1291 in preparation for and starts the conversion. After one null bit, the result of the next data exchange.
Operating Sequence (Example: Differential Inputs (CH0+, CH1–)) MSB-FIRST DATA (MSBF = 1)
tCYC CS DON'T CLK CARE START ODD/ PS SIGN DIN DON'T CARE SGL/ MSBF DIFF HI-Z DOUT B11 B1 B0 FILLED WITH ZEROES tSMPL tCONV
LSB-FIRST DATA (MSBF = 0)
tCYC CS DON’T CLK CARE START ODD/ PS SIGN DIN DON'T CARE SGL/ MSBF DIFF HI-Z B11 D B1 B0 B1 B11 OUT tSMPL tCONV FILLED WITH ZEROES 1291 AI03
Power Shutdown Operating Sequence (Example: Differential Inputs (CH0+, CH1–) and MSB-First Data)
CS SHUTDOWN* NEW CONVERSION BEGINS REQUEST POWER SHUTDOWN CLK START ODD/ PS START ODD/ PS SIGN SIGN DIN DON'T CARE SGL/ MSBF MSBF SGL/ DIFF DIFF HI-Z HI-Z D DATA NOT VALID FILLED WITH OUT B11 B0 ZEROES 1291 AI04 * STOPPING THE CLOCK WILL HELP REDUCE POWER CONSUMPTION CS CAN BE BROUGHT HIGH ONCE DIN HAS BEEN CLOCKED IN 1291fa 8