Datasheet LTC1405 (Analog Devices) - 7

LTC1405
U U U PI FU CTIO S + AIN (Pin 1):
Positive Analog Input.
OGND (Pin 21):
Output Logic Ground. Tie to GND.
– AIN (Pin 2):
Negative Analog Input.
OVDD (Pin 22):
Positive Supply for the Output Logic. Connect to Pin 23 for 5V logic. If not shorted to Pin 23,
VCM (Pin 3):
2.5V Reference Output.Optional input com- bypass to GND with a 1 mon mode for single supply operation. Bypass to GND µF ceramic. with a 1µF to 10µF ceramic.
VDD (Pin 23):
Analog 5V Supply. Bypass to GND with a 1µF ceramic.
SENSE (Pin 4):
Reference Programming Pin. Ground selects VREF = 4.096V. Short to VREF for 2.048V. Connect
GND (Pin 24):
Analog Power Ground. SENSE to VDD to drive VREF with an external reference.
VSS (Pin 25):
Negative Supply. Can be – 5V or 0V. If VSS is
VREF (Pin 5):
DAC Reference. Bypass to GND with a 1µF to not shorted to GND, bypass to GND with a 1µF ceramic. 10µF ceramic.
CLK (Pin 26):
Conversion Start Signal. This active high
GND (Pin 6):
DAC Reference Ground. signal starts a conversion on its rising edge.
VDD (Pin 7):
Analog 5V Supply. Bypass to GND with a 1µF
OF (Pin 27):
Overflow Output. This signal is high when the to 10µF ceramic. digital output is 011111111111 or 100000000000.
GND (Pin 8):
Analog Power Ground.
GAIN (Pin 28):
Gain Select for Input PGA. 5V selects an input gain of 1, 0V selects a gain of 2.
D11 to D0 (Pins 9 to 20):
Data Outputs. The output format is two’s complement. 1405fa 7