Datasheet LTC1408 (Analog Devices) - 8

LTC1408
U U U PI FU CTIO S CH3+ (Pin 14):
Non-Inverting Channel 3. CH3+ operates
VDD (Pin 25):
3V Positive Digital Supply. This pin supplies fully differentially with respect to CH3– with a 0V to 2.5V, 3V to the logic section. Bypass to DGND pin and solid or ±1.25V differential swing and a 0V to VDD absolute analog ground plane with a 10µF ceramic capacitor (or input range. 10µF tantalum in parallel with 0.1µF ceramic). Keep in mind that internal digital output signal currents flow
CH3– (Pin 15):
Inverting Channel 3. CH3– operates fully through this pin. Care should be taken to place the 0.1µF differentially with respect to CH3+ with a –2.5V to 0V, or ± bypass capacitor as close to Pin 25 as possible. Pin 25 1.25V differential swing and a 0V to VDD absolute must be tied to Pin 24. input range.
SEL2 (Pin 26):
Most significant bit controlling the
CH4+ (Pin 17):
Non-Inverting Channel 4. CH4+ operates number of channels being converted. In combination with fully differentially with respect to CH4– with a 0V to 2.5V, SEL1 and SEL0, 000 selects just the first channel (CH0) for or ±1.25V differential swing and a 0V to VDD absolute input conversion. Incrementing SELx selects additional range. channels(CH0–CH5) for conversion. 101, 110 or 111
CH4– (Pin 18):
Inverting Channel 4. CH4– operates fully select all 6 channels for conversion. Must be kept in a fixed differentially with respect to CH4+ with a –2.5V to 0V, or state during conversion and during the subsequent con- ±1.25V differential swing and a 0V to VDD absolute input version to read data. range.
SEL1 (Pin 27):
Middle significance bit controlling the
CH5+ (Pin 20):
Non-Inverting Channel 5. CH5+ operates number of channels being converted. In combination with fully differentially with respect to CH5– with a 0V to 2.5V, SEL0 and SEL2, 000 selects just the first channel (CH0) for or ±1.25V differential swing and a 0V to VDD absolute input conversion. Incrementing SELx selects additional range. channels for conversion. 101, 110 or 111 select all 6
CH5– (Pin 21):
Inverting Channel 5. CH5– operates fully channels (CH0–CH5) for conversion. Must be kept in a differentially with respect to CH5+ with a –2.5V to 0V, or fixed state during conversion and during the subsequent ±1.25V differential swing and a 0V to V conversion to read data. DD absolute input range.
SEL0 (Pin 28):
Least significant bit controlling the
GND (PIN 22):
Analog Ground for Reference. Analog number of channels being converted. In combination with ground must be tied directly to the solid ground plane SEL1 and SEL2, 000 selects just the first channel (CH0) for under the part. Analog signal currents flow through this conversion. Incrementing SELx selects additional connection. The 10µF reference bypass capacitor should channels for conversion. 101, 110 or 111 select all 6 be returned to this pad. channels (CH0–CH5) for conversion. Must be kept in a fixed state during conversion and during the subsequent
VREF (Pin 23):
2.5V Internal Reference. Bypass to GND conversion to read data. and a solid analog ground plane with a 10µF ceramic capacitor (or 10µF tantalum in parallel with 0.1µF ce-
BIP (Pin 29):
Bipolar/Unipolar Mode. The input differen- ramic). Can be overdriven by an external reference voltage tial range is 0V – 2.5V when BIP is LOW, and it is ±1.25 between 2.55% and V when BIP is HIGH. Must be kept in fixed state during DD, VCC. conversion and during subsequent conversion to read
VCC (Pin 24):
3V Positive Analog Supply. This pin supplies data. When changing BIP between conversions the full 3V to the analog section. Bypass to the solid analog acquisition time must be allowed before starting the next ground plane with a 10µF ceramic capacitor (or 10µF conversion. The output data is in 2’s complement tantalum) in parallel with 0.1µF ceramic. Care should be format for bipolar mode and straight binary format for taken to place the 0.1µF bypass capacitor as close to unipolar mode. Pin 24 as possible. Pin 24 must be tied to Pin 25. 1408fa 8