Datasheet LTC1412 (Analog Devices) - 4
| 制造商 | Analog Devices |
| 描述 | 12-Bit, 3Msps, Sampling A/D Converter |
| 页数 / 页 | 16 / 4 — W U. TI I G CHARACTERISTICS (Note 5). SYMBOL. PARAMETER. CONDITIONS. MIN. … |
| 文件格式/大小 | PDF / 347 Kb |
| 文件语言 | 英语 |
W U. TI I G CHARACTERISTICS (Note 5). SYMBOL. PARAMETER. CONDITIONS. MIN. TYP. MAX. UNITS. Note 5:. Note 1:. Note 6:. Note 2:. Note 7:. Note 3:
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文件文字版本
LTC1412
W U TI I G CHARACTERISTICS (Note 5) SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
fSAMPLE(MAX) Maximum Sampling Frequency ● 3 MHz tTHROUGHPUT Throughput Time (Acquisition + Conversion) ● 333 ns tCONV Conversion Time ● 240 283 ns tACQ Acquisition Time ● 20 50 ns t1 CS↓ to CONVST↓ Setup Time (Notes 9, 10) ● 5 ns t2 CONVST Low Time (Note 10) ● 20 ns t3 CONVST to BUSY Delay CL = 25pF 5 ns ● 20 ns t4 Data Ready Before BUSY↑ – 20 0 20 ns ● – 25 25 ns t5 Delay Between Conversions (Note 10) ● 50 ns t6 Data Access Time After CS↓ CL = 25pF 10 35 ns ● 45 ns t7 Bus Relinquish Time 8 30 ns LTC1412C ● 35 ns LTC1412I ● 40 ns t8 CONVST High Time ● 20 ns t9 Aperture Delay of Sample-and-Hold – 1 ns The ● denotes specifications which apply over the full operating
Note 5:
VDD = 5V, fSAMPLE = 3MHz and tr = tf = 5ns unless otherwise temperature range; all other limits and typicals TA = 25°C. specified.
Note 1:
Absolute Maximum Ratings are those values beyond which the life
Note 6:
Linearity, offset and full-scale specifications apply for a single- of a device may be impaired. ended A – IN input with AIN grounded.
Note 2:
All voltage values are with respect to ground with DGND and
Note 7:
Integral nonlinearity is defined as the deviation of a code from a AGND wired together (unless otherwise noted). straight line passing through the actual endpoints of the transfer curve.
Note 3:
When these pin voltages are taken below V The deviation is measured from the center of the quantization band. SS or above VDD, they will be clamped by internal diodes. This product can handle input currents
Note 8:
Bipolar offset is the offset voltage measured from – 0.5LSB greater than 100mA below VSS or above VDD without latchup. when the output code flickers between 0000 0000 0000 and
Note 4:
When these pin voltages are taken below V 1111 1111 1111. SS they will be clamped by internal diodes. This product can handle input currents greater than
Note 9:
Guaranteed by design, not subject to test. 100mA below VSS without latchup. These pins are not clamped to VDD.
Note 10:
Recommended operating conditions.
W U W TI I G DIAGRA
CS tCONV t1 t2 CONVST t3 t5 BUSY t t 6 4 t7 DATA (N – 1) DATA N DATA (N + 1) DATA DB11 TO DB0 DB11 TO DB0 DB11 TO DB0 1412 TD 4
W U TI I G CHARACTERISTICS (Note 5) SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
fSAMPLE(MAX) Maximum Sampling Frequency ● 3 MHz tTHROUGHPUT Throughput Time (Acquisition + Conversion) ● 333 ns tCONV Conversion Time ● 240 283 ns tACQ Acquisition Time ● 20 50 ns t1 CS↓ to CONVST↓ Setup Time (Notes 9, 10) ● 5 ns t2 CONVST Low Time (Note 10) ● 20 ns t3 CONVST to BUSY Delay CL = 25pF 5 ns ● 20 ns t4 Data Ready Before BUSY↑ – 20 0 20 ns ● – 25 25 ns t5 Delay Between Conversions (Note 10) ● 50 ns t6 Data Access Time After CS↓ CL = 25pF 10 35 ns ● 45 ns t7 Bus Relinquish Time 8 30 ns LTC1412C ● 35 ns LTC1412I ● 40 ns t8 CONVST High Time ● 20 ns t9 Aperture Delay of Sample-and-Hold – 1 ns The ● denotes specifications which apply over the full operating
Note 5:
VDD = 5V, fSAMPLE = 3MHz and tr = tf = 5ns unless otherwise temperature range; all other limits and typicals TA = 25°C. specified.
Note 1:
Absolute Maximum Ratings are those values beyond which the life
Note 6:
Linearity, offset and full-scale specifications apply for a single- of a device may be impaired. ended A – IN input with AIN grounded.
Note 2:
All voltage values are with respect to ground with DGND and
Note 7:
Integral nonlinearity is defined as the deviation of a code from a AGND wired together (unless otherwise noted). straight line passing through the actual endpoints of the transfer curve.
Note 3:
When these pin voltages are taken below V The deviation is measured from the center of the quantization band. SS or above VDD, they will be clamped by internal diodes. This product can handle input currents
Note 8:
Bipolar offset is the offset voltage measured from – 0.5LSB greater than 100mA below VSS or above VDD without latchup. when the output code flickers between 0000 0000 0000 and
Note 4:
When these pin voltages are taken below V 1111 1111 1111. SS they will be clamped by internal diodes. This product can handle input currents greater than
Note 9:
Guaranteed by design, not subject to test. 100mA below VSS without latchup. These pins are not clamped to VDD.
Note 10:
Recommended operating conditions.
W U W TI I G DIAGRA
CS tCONV t1 t2 CONVST t3 t5 BUSY t t 6 4 t7 DATA (N – 1) DATA N DATA (N + 1) DATA DB11 TO DB0 DB11 TO DB0 DB11 TO DB0 1412 TD 4