Datasheet LTC2145-12, LTC2144-12, LTC2143-12 (Analog Devices) - 6
| 制造商 | Analog Devices |
| 描述 | 12-Bit, 125Msps Low Power Dual ADCs |
| 页数 / 页 | 38 / 6 — DIGITAL INPUTS AND OUTPUTS. The. denotes the specifications which apply … |
| 文件格式/大小 | PDF / 1.0 Mb |
| 文件语言 | 英语 |
DIGITAL INPUTS AND OUTPUTS. The. denotes the specifications which apply over the full operating
该数据表的模型线
- LTC2143CUP-12#PBF LTC2143CUP-12#PBF LTC2143CUP-12#TRPBF LTC2143CUP-12#TRPBF LTC2143IUP-12#PBF LTC2143IUP-12#PBF LTC2143IUP-12#TRPBF LTC2143IUP-12#TRPBF
文件文字版本
LTC2145-12/ LTC2144-12/LTC2143-12
DIGITAL INPUTS AND OUTPUTS The
l
denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. (Note 5) SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS ENCODE INPUTS (ENC+, ENC– ) Differential Encode Mode (ENC– Not Tied to GND)
VID Differential Input Voltage (Note 8) l 0.2 V VICM Common Mode Input Voltage Internally Set 1.2 V Externally Set (Note 8) l 1.1 1.6 V VIN Input Voltage Range ENC+, ENC– to GND l 0.2 3.6 V RIN Input Resistance (See Figure 10) 10 kΩ CIN Input Capacitance (Note 8) 3.5 pF
Single-Ended Encode Mode (ENC– Tied to GND)
VIH High Level Input Voltage VDD = 1.8V l 1.2 V VIL Low Level Input Voltage VDD = 1.8V l 0.6 V VIN Input Voltage Range ENC+ to GND l 0 3.6 V RIN Input Resistance (See Figure 11) 30 kΩ CIN Input Capacitance (Note 8) 3.5 pF
DIGITAL INPUTS (CS, SDI, SCK in Serial or Parallel Programming Mode. SDO in Parallel Programming Mode)
VIH High Level Input Voltage VDD = 1.8V l 1.3 V VIL Low Level Input Voltage VDD = 1.8V l 0.6 V IIN Input Current VIN = 0V to 3.6V l –10 10 μA CIN Input Capacitance (Note 8) 3 pF
SDO OUTPUT (Serial Programming Mode. Open-Drain Output. Requires 2kΩ Pull-Up Resistor if SDO is Used)
ROL Logic Low Output Resistance to GND VDD = 1.8V, SDO = 0V 200 Ω IOH Logic High Output Leakage Current SDO = 0V to 3.6V l –10 10 μA COUT Output Capacitance (Note 8) 3 pF
DIGITAL DATA OUTPUTS (CMOS MODES: FULL DATA RATE AND DOUBLE DATA RATE) OVDD = 1.8V
VOH High Level Output Voltage IO = –500μA l 1.750 1.790 V VOL Low Level Output Voltage IO = 500μA l 0.010 0.050 V
OVDD = 1.5V
VOH High Level Output Voltage IO = –500μA 1.488 V VOL Low Level Output Voltage IO = 500μA 0.010 V
OVDD = 1.2V
VOH High Level Output Voltage IO = –500μA 1.185 V VOL Low Level Output Voltage IO = 500μA 0.010 V
DIGITAL DATA OUTPUTS (LVDS MODE)
VOD Differential Output Voltage 100Ω Differential Load, 3.5mA Mode l 247 350 454 mV 100Ω Differential Load, 1.75mA Mode 175 mV VOS Common Mode Output Voltage 100Ω Differential Load, 3.5mA Mode l 1.125 1.250 1.375 V 100Ω Differential Load, 1.75mA Mode 1.250 V RTERM On-Chip Termination Resistance Termination Enabled, OVDD = 1.8V 100 Ω 21454312fa 6
DIGITAL INPUTS AND OUTPUTS The
l
denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. (Note 5) SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS ENCODE INPUTS (ENC+, ENC– ) Differential Encode Mode (ENC– Not Tied to GND)
VID Differential Input Voltage (Note 8) l 0.2 V VICM Common Mode Input Voltage Internally Set 1.2 V Externally Set (Note 8) l 1.1 1.6 V VIN Input Voltage Range ENC+, ENC– to GND l 0.2 3.6 V RIN Input Resistance (See Figure 10) 10 kΩ CIN Input Capacitance (Note 8) 3.5 pF
Single-Ended Encode Mode (ENC– Tied to GND)
VIH High Level Input Voltage VDD = 1.8V l 1.2 V VIL Low Level Input Voltage VDD = 1.8V l 0.6 V VIN Input Voltage Range ENC+ to GND l 0 3.6 V RIN Input Resistance (See Figure 11) 30 kΩ CIN Input Capacitance (Note 8) 3.5 pF
DIGITAL INPUTS (CS, SDI, SCK in Serial or Parallel Programming Mode. SDO in Parallel Programming Mode)
VIH High Level Input Voltage VDD = 1.8V l 1.3 V VIL Low Level Input Voltage VDD = 1.8V l 0.6 V IIN Input Current VIN = 0V to 3.6V l –10 10 μA CIN Input Capacitance (Note 8) 3 pF
SDO OUTPUT (Serial Programming Mode. Open-Drain Output. Requires 2kΩ Pull-Up Resistor if SDO is Used)
ROL Logic Low Output Resistance to GND VDD = 1.8V, SDO = 0V 200 Ω IOH Logic High Output Leakage Current SDO = 0V to 3.6V l –10 10 μA COUT Output Capacitance (Note 8) 3 pF
DIGITAL DATA OUTPUTS (CMOS MODES: FULL DATA RATE AND DOUBLE DATA RATE) OVDD = 1.8V
VOH High Level Output Voltage IO = –500μA l 1.750 1.790 V VOL Low Level Output Voltage IO = 500μA l 0.010 0.050 V
OVDD = 1.5V
VOH High Level Output Voltage IO = –500μA 1.488 V VOL Low Level Output Voltage IO = 500μA 0.010 V
OVDD = 1.2V
VOH High Level Output Voltage IO = –500μA 1.185 V VOL Low Level Output Voltage IO = 500μA 0.010 V
DIGITAL DATA OUTPUTS (LVDS MODE)
VOD Differential Output Voltage 100Ω Differential Load, 3.5mA Mode l 247 350 454 mV 100Ω Differential Load, 1.75mA Mode 175 mV VOS Common Mode Output Voltage 100Ω Differential Load, 3.5mA Mode l 1.125 1.250 1.375 V 100Ω Differential Load, 1.75mA Mode 1.250 V RTERM On-Chip Termination Resistance Termination Enabled, OVDD = 1.8V 100 Ω 21454312fa 6