Datasheet LTC2153-12 (Analog Devices) - 5

LTC2153-12
D igiTal inpuTs anD ouTpuTs The
l
denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. (Note 5) SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS DIGITAL DATA OUTPUTS
VOD Differential Output Voltage 100Ω Differential Load, 3.5mA Mode l 247 350 454 mV 100Ω Differential Load, 1.75mA Mode l 125 175 250 mV VOS Common Mode Output Voltage 100Ω Differential Load, 3.5mA Mode l 1.125 1.250 1.375 V 100Ω Differential Load, 1.75mA Mode l 1.125 1.250 1.375 V RTERM On-Chip Termination Resistance Termination Enabled, OVDD = 1.8V 100 Ω
Ti Ming characTerisTics The
l
denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. (Note 5) SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
fS Sampling Frequency (Note 9) l 10 310 MHz tL ENC Low Time (Note 8) Duty Cycle Stabilizer Off l 1.5 1.61 50 ns Duty Cycle Stabilizer On l 1.2 1.61 50 ns tH ENC High Time (Note 8) Duty Cycle Stabilizer Off l 1.5 1.61 50 ns Duty Cycle Stabilizer On l 1.2 1.61 50 ns
DIGITAL DATA OUTPUTS MIN TYP MAX UNITS
tD ENC to Data Delay CL = 5pF (Note 8) l 1.7 2 2.3 ns tC ENC to CLKOUT Delay CL = 5pF (Note 8) l 1.3 1.6 2 ns tSKEW DATA to CLKOUT Skew tD – tC (Note 8) l 0.3 0.4 0.55 ns Pipeline Latency 6 6 Cycles
SPI Port Timing (Note 8)
tSCK SCK Period Write Mode l 40 ns Readback Mode CSDO= 20pF, RPULLUP = 2k l 250 ns tS CS to SCK Set-Up Time l 5 ns tH SCK to CS Hold Time l 5 ns tDS SDI Set-Up Time l 5 ns tDH SDI Hold Time l 5 ns tDO SCK Falling to SDO Valid Readback Mode, CSDO = 20pF, RPULLUP = 2k l 125 ns
Note 1:
Stresses beyond those listed under Absolute Maximum Ratings
Note 5:
VDD = OVDD = 1.8V, fSAMPLE = 310MHz, differential ENC+/ENC– = may cause permanent damage to the device. Exposure to any Absolute 2VP-P sine wave, input range = 1.32VP-P with differential drive, unless Maximum Rating condition for extended periods may affect device otherwise noted. reliability and lifetime.
Note 6:
Integral nonlinearity is defined as the deviation of a code from a
Note 2:
All voltage values are with respect to GND with GND and OGND best fit straight line to the transfer curve. The deviation is measured from shorted (unless otherwise noted). the center of the quantization band.
Note 3:
When these pin voltages are taken below GND or above VDD, they
Note 7:
Offset error is the offset voltage measured from –0.5LSB when the will be clamped by internal diodes. This product can handle input currents output code flickers between 0000 0000 0000 and 1111 1111 1111 in 2’s of greater than 100mA below GND or above VDD without latchup. complement output mode.
Note 4:
When these pin voltages are taken below GND they will be
Note 8:
Guaranteed by design, not subject to test. clamped by internal diodes. When these pin voltages are taken above VDD they will not be clamped by internal diodes. This product can handle input
Note 9:
Recommended operating conditions. currents of greater than 100mA below GND without latchup. 215312fa For more information www.linear.com/LTC2153-12 5 Document Outline Features Description Applications Typical Application Absolute Maximum Ratings Pin Configuration Order Information Converter Characteristics Analog Input Dynamic Accuracy Internal Reference Characteristics Power Requirements Digital Inputs And Outputs Timing Characteristics Typical Performance Characteristics Pin Functions Functional Block Diagram Timing Diagrams Applications Information Typical Applications Package Description Related Parts