Datasheet LTC2172-14, LTC2171-14, LTC2170-14 (Analog Devices) - 10
| 制造商 | Analog Devices |
| 描述 | 14-Bit, 65Msps Low Power Quad ADCs |
| 页数 / 页 | 34 / 10 — TiMing DiagraMs. 1-Lane Output Mode, 14-Bit Serialization. 1-Lane Output … |
| 文件格式/大小 | PDF / 1.6 Mb |
| 文件语言 | 英语 |
TiMing DiagraMs. 1-Lane Output Mode, 14-Bit Serialization. 1-Lane Output Mode, 12-Bit Serialization
该数据表的模型线
- LTC2170CUKG-14#PBF LTC2170CUKG-14#PBF LTC2170CUKG-14#TRPBF LTC2170CUKG-14#TRPBF LTC2170IUKG-14#PBF LTC2170IUKG-14#PBF LTC2170IUKG-14#TRPBF LTC2170IUKG-14#TRPBF
文件文字版本
LTC2172-14/ LTC2171-14/LTC2170-14
TiMing DiagraMs 1-Lane Output Mode, 14-Bit Serialization
tAP N + 1 ANALOG INPUT N tENCH tENCL ENC– ENC+ tSER DCO– DCO+ tFRAME tDATA tSER FR– FR+ tPD tSER OUT#A– D3 D2 D1 D0 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0 D13 D12 D11 D10 OUT#A+ 217214 TD05 SAMPLE N-6 SAMPLE N-5 SAMPLE N-4 OUT#B+, OUT#B– ARE DISABLED
1-Lane Output Mode, 12-Bit Serialization
tAP ANALOG N + 1 INPUT N tENCH tENCL ENC– ENC+ tSER DCO– DCO+ tFRAME tDATA tSER FR– FR+ tPD tSER OUT#A– D5 D4 D3 D2 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D13 D12 D11 OUT#A+ 217214 TD06 SAMPLE N-6 SAMPLE N-5 SAMPLE N-4 OUT#B+, OUT#B– ARE DISABLED 21721014fb 10 Document Outline Features Applications Description Typical Application Absolute Maximum Ratings Pin Configuration Order Information Converter Characteristics Analog Input Dynamic Accuracy Internal Reference Characteristics Digital Inputs and Outputs Power Requirements Timing Characteristics Timing Diagrams Typical Performance Characteristics Pin Functions Functional Block Diagram Applications Information Typical Applications Package Description Revision History Related Parts
TiMing DiagraMs 1-Lane Output Mode, 14-Bit Serialization
tAP N + 1 ANALOG INPUT N tENCH tENCL ENC– ENC+ tSER DCO– DCO+ tFRAME tDATA tSER FR– FR+ tPD tSER OUT#A– D3 D2 D1 D0 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0 D13 D12 D11 D10 OUT#A+ 217214 TD05 SAMPLE N-6 SAMPLE N-5 SAMPLE N-4 OUT#B+, OUT#B– ARE DISABLED
1-Lane Output Mode, 12-Bit Serialization
tAP ANALOG N + 1 INPUT N tENCH tENCL ENC– ENC+ tSER DCO– DCO+ tFRAME tDATA tSER FR– FR+ tPD tSER OUT#A– D5 D4 D3 D2 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D13 D12 D11 OUT#A+ 217214 TD06 SAMPLE N-6 SAMPLE N-5 SAMPLE N-4 OUT#B+, OUT#B– ARE DISABLED 21721014fb 10 Document Outline Features Applications Description Typical Application Absolute Maximum Ratings Pin Configuration Order Information Converter Characteristics Analog Input Dynamic Accuracy Internal Reference Characteristics Digital Inputs and Outputs Power Requirements Timing Characteristics Timing Diagrams Typical Performance Characteristics Pin Functions Functional Block Diagram Applications Information Typical Applications Package Description Revision History Related Parts