Datasheet LTC2182, LTC2181, LTC2180 (Analog Devices) - 10
| 制造商 | Analog Devices |
| 描述 | 16-Bit, 65Msps Low Power Dual ADCs |
| 页数 / 页 | 36 / 10 — TIMING DIAGRAMS. Double Data Rate LVDS Output Mode Timing. All Outputs … |
| 文件格式/大小 | PDF / 4.0 Mb |
| 文件语言 | 英语 |
TIMING DIAGRAMS. Double Data Rate LVDS Output Mode Timing. All Outputs Are Differential and Have LVDS Levels
该数据表的模型线
- LTC2180CUP#PBF LTC2180CUP#PBF LTC2180CUP#TRPBF LTC2180CUP#TRPBF LTC2180IUP#PBF LTC2180IUP#PBF LTC2180IUP#TRPBF LTC2180IUP#TRPBF
文件文字版本
LTC2182/LTC2181/LTC2180
TIMING DIAGRAMS Double Data Rate LVDS Output Mode Timing All Outputs Are Differential and Have LVDS Levels
tAP CH 1 A A + 2 A + 4 ANALOG INPUT A + 3 tAP A + 1 CH 2 B B + 2 B + 4 ANALOG INPUT B + 3 tH B + 1 tL ENC– ENC+ tD tD D1_0_1+ BIT 0 BIT 1 BIT 0 BIT 1 BIT 0 BIT 1 BIT 0 BIT 1 BIT 0 A-6 A-6 A-5 A-5 A-4 A-4 A-3 A-3 A-2 D1_0_1– ••• D1_14_15+ BIT 14 BIT 15 BIT 14 BIT 15 BIT 14 BIT 15 BIT 14 BIT 15 BIT 14 A-6 A-6 A-5 A-5 A-4 A-4 A-3 A-3 A-2 D1_14_15– D2_0_1+ BIT 0 BIT 1 BIT 0 BIT 1 BIT 0 BIT 1 BIT 0 BIT 1 BIT 0 B-6 B-6 B-5 B-5 B-4 B-4 B-3 B-3 B-2 D2_0_1– ••• D2_14_15+ BIT 14 BIT 15 BIT 14 BIT 15 BIT 14 BIT 15 BIT 14 BIT 15 BIT 14 B-6 B-6 B-5 B-5 B-4 B-4 B-3 B-3 B-2 D2_14_15– OF2_1+ OF OF OF OF OF OF OF OF OF B-6 A-6 B-5 A-5 B-4 A-4 B-3 A-3 B-2 OF2_1– tC tC CLKOUT+ CLKOUT– 218210 TD03
SPI Port Timing (Readback Mode)
tS tDS tDH tSCK tH CS SCK tDO SDI R/W A6 A5 A4 A3 A2 A1 A0 XX XX XX XX XX XX XX XX SDO D7 D6 D5 D4 D3 D2 D1 D0 HIGH IMPEDANCE
SPI Port Timing (Write Mode)
CS SCK SDI R/W A6 A5 A4 A3 A2 A1 A0 D7 D6 D5 D4 D3 D2 D1 D0 SDO 218210 TD04 HIGH IMPEDANCE 218210f 10 Document Outline FEATURES DESCRIPTION APPLICATIONS TYPICAL APPLICATION ABSOLUTE MAXIMUM RATINGS PIN CONFIGURATIONS ORDER INFORMATION CONVERTER CHARACTERISTICS ANALOG INPUT DYNAMIC ACCURACY INTERNAL REFERENCE CHARACTERISTICS DIGITAL INPUTS AND OUTPUTS POWER REQUIREMENTS TIMING CHARACTERISTICS TIMING DIAGRAMS TYPICAL PERFORMANCE CHARACTERISTICS PIN FUNCTIONS FUNCTIONAL BLOCK DIAGRAM APPLICATIONS INFORMATION TYPICAL APPLICATIONS PACKAGE DESCRIPTION TYPICAL APPLICATION RELATED PARTS
TIMING DIAGRAMS Double Data Rate LVDS Output Mode Timing All Outputs Are Differential and Have LVDS Levels
tAP CH 1 A A + 2 A + 4 ANALOG INPUT A + 3 tAP A + 1 CH 2 B B + 2 B + 4 ANALOG INPUT B + 3 tH B + 1 tL ENC– ENC+ tD tD D1_0_1+ BIT 0 BIT 1 BIT 0 BIT 1 BIT 0 BIT 1 BIT 0 BIT 1 BIT 0 A-6 A-6 A-5 A-5 A-4 A-4 A-3 A-3 A-2 D1_0_1– ••• D1_14_15+ BIT 14 BIT 15 BIT 14 BIT 15 BIT 14 BIT 15 BIT 14 BIT 15 BIT 14 A-6 A-6 A-5 A-5 A-4 A-4 A-3 A-3 A-2 D1_14_15– D2_0_1+ BIT 0 BIT 1 BIT 0 BIT 1 BIT 0 BIT 1 BIT 0 BIT 1 BIT 0 B-6 B-6 B-5 B-5 B-4 B-4 B-3 B-3 B-2 D2_0_1– ••• D2_14_15+ BIT 14 BIT 15 BIT 14 BIT 15 BIT 14 BIT 15 BIT 14 BIT 15 BIT 14 B-6 B-6 B-5 B-5 B-4 B-4 B-3 B-3 B-2 D2_14_15– OF2_1+ OF OF OF OF OF OF OF OF OF B-6 A-6 B-5 A-5 B-4 A-4 B-3 A-3 B-2 OF2_1– tC tC CLKOUT+ CLKOUT– 218210 TD03
SPI Port Timing (Readback Mode)
tS tDS tDH tSCK tH CS SCK tDO SDI R/W A6 A5 A4 A3 A2 A1 A0 XX XX XX XX XX XX XX XX SDO D7 D6 D5 D4 D3 D2 D1 D0 HIGH IMPEDANCE
SPI Port Timing (Write Mode)
CS SCK SDI R/W A6 A5 A4 A3 A2 A1 A0 D7 D6 D5 D4 D3 D2 D1 D0 SDO 218210 TD04 HIGH IMPEDANCE 218210f 10 Document Outline FEATURES DESCRIPTION APPLICATIONS TYPICAL APPLICATION ABSOLUTE MAXIMUM RATINGS PIN CONFIGURATIONS ORDER INFORMATION CONVERTER CHARACTERISTICS ANALOG INPUT DYNAMIC ACCURACY INTERNAL REFERENCE CHARACTERISTICS DIGITAL INPUTS AND OUTPUTS POWER REQUIREMENTS TIMING CHARACTERISTICS TIMING DIAGRAMS TYPICAL PERFORMANCE CHARACTERISTICS PIN FUNCTIONS FUNCTIONAL BLOCK DIAGRAM APPLICATIONS INFORMATION TYPICAL APPLICATIONS PACKAGE DESCRIPTION TYPICAL APPLICATION RELATED PARTS