Datasheet LTC2185, LTC2184, LTC2183 (Analog Devices) - 9
| 制造商 | Analog Devices |
| 描述 | 16-Bit, 125Msps Low Power Dual ADCs |
| 页数 / 页 | 36 / 9 — TiMing DiagraMs. Full-Rate CMOS Output Mode Timing. All Outputs Are … |
| 文件格式/大小 | PDF / 824 Kb |
| 文件语言 | 英语 |
TiMing DiagraMs. Full-Rate CMOS Output Mode Timing. All Outputs Are Single-Ended and Have CMOS Levels
该数据表的模型线
- LTC2183CUP#PBF LTC2183CUP#PBF LTC2183CUP#TRPBF LTC2183CUP#TRPBF LTC2183IUP#PBF LTC2183IUP#PBF LTC2183IUP#TRPBF LTC2183IUP#TRPBF
文件文字版本
LTC2185/LTC2184/LTC2183
TiMing DiagraMs Full-Rate CMOS Output Mode Timing All Outputs Are Single-Ended and Have CMOS Levels
tAP CH 1 A A + 2 A + 4 ANALOG INPUT A + 3 tAP A + 1 CH 2 B B + 2 B + 4 ANALOG INPUT B + 3 tH B + 1 tL ENC– ENC+ tD D1_0 - D1_15, OF1 A – 6 A – 5 A – 4 A – 3 A – 2 D2_0 - D2_15, OF2 B – 6 B – 5 B – 4 B – 3 B – 2 tC CLKOUT+ CLKOUT– 218543 TD01
Double Data Rate CMOS Output Mode Timing All Outputs Are Single-Ended and Have CMOS Levels
tAP CH 1 A A + 2 A + 4 ANALOG INPUT A + 3 tAP A + 1 CH 2 B B + 2 B + 4 ANALOG INPUT B + 3 tH B + 1 tL ENC– ENC+ tD tD BIT 0 BIT 1 BIT 0 BIT 1 BIT 0 BIT 1 BIT 0 BIT 1 BIT 0 D1_0_1 A-6 A-6 A-5 A-5 A-4 A-4 A-3 A-3 A-2 ••• BIT 14 BIT 15 BIT 14 BIT 15 BIT 14 BIT 15 BIT 14 BIT 15 BIT 14 D1_14_15 A-6 A-6 A-5 A-5 A-4 A-4 A-3 A-3 A-2 BIT 0 BIT 1 BIT 0 BIT 1 BIT 0 BIT 1 BIT 0 BIT 1 BIT 0 D2_0_1 B-6 B-6 B-5 B-5 B-4 B-4 B-3 B-3 B-2 ••• BIT 14 BIT 15 BIT 14 BIT 15 BIT 14 BIT 15 BIT 14 BIT 15 BIT 14 D2_14_15 B-6 B-6 B-5 B-5 B-4 B-4 B-3 B-3 B-2 OF OF OF OF OF OF OF OF OF OF2_1 B-6 A-6 B-5 A-5 B-4 A-4 B-3 A-3 B-2 tC tC CLKOUT+ CLKOUT– 218543 TD02 218543f 9 Document Outline Features Description Applications Typical Application Absolute Maximum Ratings Pin Configuration Order Information Converter Characteristics Analog Input Dynamic Accuracy Internal Reference Characteristics Digital Inputs and Outputs Power Requirements Timing Characteristics Timing Diagrams Typical Performance Characteristics Pin Functions Functional Block Diagram Applications Information Typical Applications Package Description Typical Application Related Parts
TiMing DiagraMs Full-Rate CMOS Output Mode Timing All Outputs Are Single-Ended and Have CMOS Levels
tAP CH 1 A A + 2 A + 4 ANALOG INPUT A + 3 tAP A + 1 CH 2 B B + 2 B + 4 ANALOG INPUT B + 3 tH B + 1 tL ENC– ENC+ tD D1_0 - D1_15, OF1 A – 6 A – 5 A – 4 A – 3 A – 2 D2_0 - D2_15, OF2 B – 6 B – 5 B – 4 B – 3 B – 2 tC CLKOUT+ CLKOUT– 218543 TD01
Double Data Rate CMOS Output Mode Timing All Outputs Are Single-Ended and Have CMOS Levels
tAP CH 1 A A + 2 A + 4 ANALOG INPUT A + 3 tAP A + 1 CH 2 B B + 2 B + 4 ANALOG INPUT B + 3 tH B + 1 tL ENC– ENC+ tD tD BIT 0 BIT 1 BIT 0 BIT 1 BIT 0 BIT 1 BIT 0 BIT 1 BIT 0 D1_0_1 A-6 A-6 A-5 A-5 A-4 A-4 A-3 A-3 A-2 ••• BIT 14 BIT 15 BIT 14 BIT 15 BIT 14 BIT 15 BIT 14 BIT 15 BIT 14 D1_14_15 A-6 A-6 A-5 A-5 A-4 A-4 A-3 A-3 A-2 BIT 0 BIT 1 BIT 0 BIT 1 BIT 0 BIT 1 BIT 0 BIT 1 BIT 0 D2_0_1 B-6 B-6 B-5 B-5 B-4 B-4 B-3 B-3 B-2 ••• BIT 14 BIT 15 BIT 14 BIT 15 BIT 14 BIT 15 BIT 14 BIT 15 BIT 14 D2_14_15 B-6 B-6 B-5 B-5 B-4 B-4 B-3 B-3 B-2 OF OF OF OF OF OF OF OF OF OF2_1 B-6 A-6 B-5 A-5 B-4 A-4 B-3 A-3 B-2 tC tC CLKOUT+ CLKOUT– 218543 TD02 218543f 9 Document Outline Features Description Applications Typical Application Absolute Maximum Ratings Pin Configuration Order Information Converter Characteristics Analog Input Dynamic Accuracy Internal Reference Characteristics Digital Inputs and Outputs Power Requirements Timing Characteristics Timing Diagrams Typical Performance Characteristics Pin Functions Functional Block Diagram Applications Information Typical Applications Package Description Typical Application Related Parts