Datasheet LTC2224 (Analog Devices) - 2

制造商Analog Devices
描述12-Bit, 135Msps ADC
页数 / 页24 / 2 — ABSOLUTE AXI U. RATI GS. PACKAGE/ORDER I FOR ATIO. OVDD = VDD (Notes 1, …
文件格式/大小PDF / 625 Kb
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ABSOLUTE AXI U. RATI GS. PACKAGE/ORDER I FOR ATIO. OVDD = VDD (Notes 1, 2). Order Options. CO VERTER CHARACTERISTICS The

ABSOLUTE AXI U RATI GS PACKAGE/ORDER I FOR ATIO OVDD = VDD (Notes 1, 2) Order Options CO VERTER CHARACTERISTICS The

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文件文字版本

LTC2224
W W W U U W U ABSOLUTE AXI U RATI GS PACKAGE/ORDER I FOR ATIO OVDD = VDD (Notes 1, 2)
TOP VIEW Supply Voltage (VDD) ... 4V Digital Output Ground Voltage (OGND) ... –0.3V to 1V DD DD DD CM Analog Input Voltage (Note 3) ... –0.3V to (VDD + 0.3V) 48 GND 47 V 46 V 45 GND 44 V 43 SENSE 42 MODE 41 OF 40 D11 39 D10 38 OGND 37 OV Digital Input Voltage .. –0.3V to (VDD + 0.3V) A + 36 D9 Digital Output Voltage ... –0.3V to (OV IN 1 DD + 0.3V) A – IN 2 35 D8 Power Dissipation .. 1500mW REFHA 3 34 D7 REFHA 4 33 OVDD Operating Temperature Range REFLB 5 32 OGND LTC2224C ... 0°C to 70°C REFLB 6 31 D6 49 REFHB 7 30 D5 LTC2224I ...–40°C to 85°C REFHB 8 29 D4 Storage Temperature Range ..–65°C to 125°C REFLA 9 28 OVDD REFLA 10 27 OGND VDD 11 26 D3 VDD 12 25 D2 14 16 17 18 19 20 23 + – DD OE DO 21 DD D1 24 GND 13 V GND 15 ENC ENC SHDN OGND 22 OV CLOCKOUT UK PACKAGE 48-LEAD (7mm × 7mm) PLASTIC QFN EXPOSED PAD IS GND (PIN 49), MUST BE SOLDERED TO PCB TJMAX = 125°C, θJA = 29°C/W ORDER PART UK PART* NUMBER MARKING LTC2224CUK LTC2224UK LTC2224IUK LTC2224UK
Order Options
Tape and Reel: Add #TR Lead Free: Add #PBF Lead Free Tape and Reel: Add #TRPBF Lead Free Part Marking: http://www.linear.com/leadfree/ Consult LTC Marketing for parts specified with wider operating temperature ranges. *The temperature grade is identified by a label on the shipping container.
U CO VERTER CHARACTERISTICS The

denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25
°
C. (Note 4) PARAMETER CONDITIONS MIN TYP MAX UNITS
Resolution (No Missing Codes) ● 12 Bits Integral Linearity Error Differential Analog Input (Note 5) ● –1 ±0.4 1 LSB Differential Linearity Error Differential Analog Input ● –1 ±0.3 1 LSB Integral Linearity Error Single-Ended Analog Input (Note 5) ±1 LSB Differential Linearity Error Single-Ended Analog Input ±0.3 LSB Offset Error (Note 6) ● –35 ±3 35 mV Gain Error External Reference ● –2.5 ±0.5 2.5 %FS Offset Drift ±10 µV/C Full-Scale Drift Internal Reference ±30 ppm/C External Reference ±15 ppm/C Transition Noise SENSE = 1V 0.5 LSBRMS 2224fa 2