Datasheet LTC1799 (Analog Devices) - 10
| 制造商 | Analog Devices |
| 描述 | 1kHz to 33MHz Resistor Set SOT-23 Oscillator |
| 页数 / 页 | 14 / 10 — applicaTions inForMaTion. Table 2. Variation of VRES for Various Values … |
| 文件格式/大小 | PDF / 238 Kb |
| 文件语言 | 英语 |
applicaTions inForMaTion. Table 2. Variation of VRES for Various Values of RIN || RSET. RIN || RSET (VIN = V+). VRES, V+ = 3V
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LTC1799
applicaTions inForMaTion
Once RIN/RSET is known, calculate RSET from: is the master oscillator frequency divided by 20, (fOSC/20). In general, for minimum output jitter the modulation fre- R 10MHz SET = • 10k • quency should be limited to f N f OSC/20 or 10kHz, whichever OSC(MAX) is less. For best performance at all frequencies, the value ⎡ ⎛ ⎞⎤ for fOSC should be the master oscillator frequency (N = 1) ⎢ V RIN IN(MAX) − V+ ( )+VRES⎜1+ ⎟⎥ when VIN is at the lowest level. ⎢ ⎝ RSET ⎠⎥ (3) ⎢ ⎛ ⎞ ⎥
Table 2. Variation of VRES for Various Values of RIN || RSET
⎢ V RIN RES ⎜ ⎟ ⎥
RIN || RSET (VIN = V+) VRES, V+ = 3V VRES, V+ = 5V
⎣ ⎝R SET ⎠ ⎦ 10k 0.98V 1.06V 20k 1.03V 1.11V
Maximum VCO Modulation Bandwidth
40k 1.09V 1.17V The maximum VCO modulation bandwidth is 10kHz; that 80k 1.13V 1.21V is, the LTC1799 will respond to changes in VIN at a rate 160k 1.16V 1.24V up to 25kHz. In lower frequency applications however, the VRES = Voltage across RSET modulation frequency may need to be limited to a lower
Note:
All of the calculations above assume VRES = 1.1V, although VRES ≈ 1.1V. For rate to prevent an increase in output jitter. This lower limit completeness, Table 2 shows the variation of VRES against various parallel combinations of RIN and RSET (VIN = V+). Calculate first with VRES ≈ 1.1V, then use Table 2 to get a better approximation of VRES, then recalculate the resistor values using the new value for VRES. 1799fd 10 For more information www.linear.com/LTC1799 Document Outline Features Applications Description Typical Application Absolute Maximum Ratings Pin Configuration Order Information Electrical Characteristics Typical Performance Characteristics Pin Functions Block Diagram Theory of Operation Applications Information Typical Application Package Description Revision History Typical Applications
applicaTions inForMaTion
Once RIN/RSET is known, calculate RSET from: is the master oscillator frequency divided by 20, (fOSC/20). In general, for minimum output jitter the modulation fre- R 10MHz SET = • 10k • quency should be limited to f N f OSC/20 or 10kHz, whichever OSC(MAX) is less. For best performance at all frequencies, the value ⎡ ⎛ ⎞⎤ for fOSC should be the master oscillator frequency (N = 1) ⎢ V RIN IN(MAX) − V+ ( )+VRES⎜1+ ⎟⎥ when VIN is at the lowest level. ⎢ ⎝ RSET ⎠⎥ (3) ⎢ ⎛ ⎞ ⎥
Table 2. Variation of VRES for Various Values of RIN || RSET
⎢ V RIN RES ⎜ ⎟ ⎥
RIN || RSET (VIN = V+) VRES, V+ = 3V VRES, V+ = 5V
⎣ ⎝R SET ⎠ ⎦ 10k 0.98V 1.06V 20k 1.03V 1.11V
Maximum VCO Modulation Bandwidth
40k 1.09V 1.17V The maximum VCO modulation bandwidth is 10kHz; that 80k 1.13V 1.21V is, the LTC1799 will respond to changes in VIN at a rate 160k 1.16V 1.24V up to 25kHz. In lower frequency applications however, the VRES = Voltage across RSET modulation frequency may need to be limited to a lower
Note:
All of the calculations above assume VRES = 1.1V, although VRES ≈ 1.1V. For rate to prevent an increase in output jitter. This lower limit completeness, Table 2 shows the variation of VRES against various parallel combinations of RIN and RSET (VIN = V+). Calculate first with VRES ≈ 1.1V, then use Table 2 to get a better approximation of VRES, then recalculate the resistor values using the new value for VRES. 1799fd 10 For more information www.linear.com/LTC1799 Document Outline Features Applications Description Typical Application Absolute Maximum Ratings Pin Configuration Order Information Electrical Characteristics Typical Performance Characteristics Pin Functions Block Diagram Theory of Operation Applications Information Typical Application Package Description Revision History Typical Applications