Datasheet LTC2262-14 (Analog Devices) - 3

制造商Analog Devices
描述14-Bit, 150Msps Ultralow Power 1.8V ADC
页数 / 页28 / 3 — ORDER INFORMATION LEAD FREE FINISH. TAPE AND REEL. PART MARKING*. PACKAGE …
文件格式/大小PDF / 680 Kb
文件语言英语

ORDER INFORMATION LEAD FREE FINISH. TAPE AND REEL. PART MARKING*. PACKAGE DESCRIPTION. TEMPERATURE RANGE

ORDER INFORMATION LEAD FREE FINISH TAPE AND REEL PART MARKING* PACKAGE DESCRIPTION TEMPERATURE RANGE

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LTC2262-14
ORDER INFORMATION LEAD FREE FINISH TAPE AND REEL PART MARKING* PACKAGE DESCRIPTION TEMPERATURE RANGE
LTC2262CUJ-14#PBF LTC2262CUJ-14#TRPBF LTC2262UJ-14 40-Lead (6mm × 6mm) Plastic QFN 0°C to 70°C LTC2262IUJ-14#PBF LTC2262IUJ-14#TRPBF LTC2262UJ-14 40-Lead (6mm × 6mm) Plastic QFN –40°C to 85°C Consult LTC Marketing for parts specified with wider operating temperature ranges. *The temperature grade is identified by a label on the shipping container. Consult LTC Marketing for information on non-standard lead based finish parts. For more information on lead free part marking, go to: http://www.linear.com/leadfree/ For more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/
CONVERTER CHARACTERISTICS The
l
denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. (Note 5) PARAMETER CONDITIONS MIN TYP MAX UNITS
Resolution (No Missing Codes) l 14 Bits Integral Linearity Error Differential Analog Input (Note 6) l –4 ±1 4 LSB Differential Linearity Error Differential Analog Input l –1 ±0.3 1 LSB Offset Error (Note 7) l –9 ±1.5 9 mV Gain Error Internal Reference ±1.5 %FS External Reference l –1.5 ±0.4 1.5 %FS Offset Drift ±20 µV/°C Full-Scale Drift Internal Reference ±30 ppm/°C External Reference ±10 ppm/°C Transition Noise External Reference 1.2 LSBRMS
ANALOG INPUT The
l
denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. (Note 5) SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
V + – IN Analog Input Range (AIN – AIN ) 1.7V < VDD < 1.9V l 1 to 2 VP-P V + – IN(CM) Analog Input Common Mode (AIN + AIN )/2 Differential Analog Input (Note 8) l VCM – 100mV VCM VCM + 100mV V VSENSE External Voltage Reference Applied to SENSE External Reference Mode l 0.625 1.250 1.300 V IINCM Analog Input Common Mode Current Per Pin, 150Msps 185 µA I + – IN1 Analog Input Leakage Current 0 < AIN , AIN < VDD, No Encode l –1 1 µA IIN2 PAR/SER Input Leakage Current 0 < PAR/SER < VDD l –3 3 µA IIN3 SENSE Input Leakage Current 0.625 < SENSE < 1.3V l –6 6 µA tAP Sample-and-Hold Acquisition Delay Time 0 ns tJITTER Sample-and-Hold Acquisition Delay Jitter 0.17 psRMS CMRR Analog Input Common Mode Rejection Ratio 80 dB BW-3B Full-Power Bandwidth Figure 6 Test Circuit 800 MHz 226214fc For more information www.linear.com/LTC2262-14 3 Document Outline Features Applications Description Typical Application Absolute Maximum Ratings Pin Configurations Order Information Converter Characteristics Analog Input Dynamic Accuracy Internal Reference Characteristics Digital Inputs and Outputs Power Requirements Timing Characteristics Timing Diagrams Typical Performance Characteristics Pin Functions Functional Block Diagram Applications Information Typical Applications Package Description Revision History Related Parts