Datasheet LTC2280 (Analog Devices)
| 制造商 | Analog Devices |
| 描述 | Dual 10-Bit, 105Msps Low Noise 3V ADC |
| 页数 / 页 | 24 / 1 — FEATURES. DESCRIPTIO. Integrated Dual 10-Bit ADCs. Sample Rate: 105Msps. … |
| 文件格式/大小 | PDF / 723 Kb |
| 文件语言 | 英语 |
FEATURES. DESCRIPTIO. Integrated Dual 10-Bit ADCs. Sample Rate: 105Msps. Single 3V Supply (2.85V to 3.4V). Low Power: 540mW
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LTC2280 Dual 10-Bit, 105Msps Low Noise 3V ADC
U FEATURES DESCRIPTIO
■
Integrated Dual 10-Bit ADCs
The LTC®2280 is a 10-bit 105Msps, low noise 3V dual ■
Sample Rate: 105Msps
A/D converter designed for digitizing high frequency, wide ■
Single 3V Supply (2.85V to 3.4V)
dynamic range signals. The LTC2280 is perfect for ■
Low Power: 540mW
demanding imaging and communications applications ■
61.6dB SNR, 85dB SFDR
with AC performance that includes 61.6dB SNR and 85dB ■ 110dB Channel Isolation at 100MHz SFDR for signals at the Nyquist frequency. ■ Flexible Input: 1VP-P to 2VP-P Range DC specs include ±0.1LSB INL (typ), ±0.1LSB DNL (typ) ■ 575MHz Full Power Bandwidth S/H and ±0.6LSB INL, ±0.6LSB DNL over temperature. The ■ Clock Duty Cycle Stabilizer transition noise is a low 0.08LSB ■ Shutdown and Nap Modes RMS. ■ Pin Compatible Family A single 3V supply allows low power operation. A separate 105Msps: LTC2282 (12-Bit), LTC2280 (10-Bit) output supply allows the outputs to drive 0.5V to 3.6V 80Msps: LTC2294 (12-Bit), LTC2289 (10-Bit) logic. 65Msps: LTC2293 (12-Bit), LTC2288 (10-Bit) A single-ended CLK input controls converter operation. An 40Msps: LTC2292 (12-Bit), LTC2287 (10-Bit) optional clock duty cycle stabilizer allows high perfor- 25Msps: LTC2291 (12-Bit), LTC2286 (10-Bit) mance at full speed for a wide range of clock duty cycles. 10Msps: LTC2290 (12-Bit) , LT, LTC and LTM are registered trademarks of Linear Technology Corporation. All other trademarks are the property of their respective owners. ■ 64-Pin (9mm × 9mm) QFN Package
U APPLICATIO S
■ Wireless and Wired Broadband Communication ■ Imaging Systems ■ Spectral Analysis ■ Portable Instrumentation
U TYPICAL APPLICATIO SNR vs Input Frequency, –1dB, 2V Range
+ OVDD 10-BIT 65 ANALOG INPUT PIPELINED D9A INPUT A S/H OUTPUT • ADC CORE • 64 – DRIVERS • D0A 63 OGND 62 61 60 CLK A CLOCK/DUTY CYCLE CONTROL SNR (dBFS) 59 MUX 58 CLK B CLOCK/DUTY CYCLE 57 CONTROL 56 55 OVDD 0 50 100 150 200 D9B INPUT FREQUENCY (MHz) + OUTPUT • 10-BIT • ANALOG • 2280 TA02 INPUT DRIVERS PIPELINED INPUT B D0B S/H ADC CORE – OGND 2280 TA01 2280fa 1
U FEATURES DESCRIPTIO
■
Integrated Dual 10-Bit ADCs
The LTC®2280 is a 10-bit 105Msps, low noise 3V dual ■
Sample Rate: 105Msps
A/D converter designed for digitizing high frequency, wide ■
Single 3V Supply (2.85V to 3.4V)
dynamic range signals. The LTC2280 is perfect for ■
Low Power: 540mW
demanding imaging and communications applications ■
61.6dB SNR, 85dB SFDR
with AC performance that includes 61.6dB SNR and 85dB ■ 110dB Channel Isolation at 100MHz SFDR for signals at the Nyquist frequency. ■ Flexible Input: 1VP-P to 2VP-P Range DC specs include ±0.1LSB INL (typ), ±0.1LSB DNL (typ) ■ 575MHz Full Power Bandwidth S/H and ±0.6LSB INL, ±0.6LSB DNL over temperature. The ■ Clock Duty Cycle Stabilizer transition noise is a low 0.08LSB ■ Shutdown and Nap Modes RMS. ■ Pin Compatible Family A single 3V supply allows low power operation. A separate 105Msps: LTC2282 (12-Bit), LTC2280 (10-Bit) output supply allows the outputs to drive 0.5V to 3.6V 80Msps: LTC2294 (12-Bit), LTC2289 (10-Bit) logic. 65Msps: LTC2293 (12-Bit), LTC2288 (10-Bit) A single-ended CLK input controls converter operation. An 40Msps: LTC2292 (12-Bit), LTC2287 (10-Bit) optional clock duty cycle stabilizer allows high perfor- 25Msps: LTC2291 (12-Bit), LTC2286 (10-Bit) mance at full speed for a wide range of clock duty cycles. 10Msps: LTC2290 (12-Bit) , LT, LTC and LTM are registered trademarks of Linear Technology Corporation. All other trademarks are the property of their respective owners. ■ 64-Pin (9mm × 9mm) QFN Package
U APPLICATIO S
■ Wireless and Wired Broadband Communication ■ Imaging Systems ■ Spectral Analysis ■ Portable Instrumentation
U TYPICAL APPLICATIO SNR vs Input Frequency, –1dB, 2V Range
+ OVDD 10-BIT 65 ANALOG INPUT PIPELINED D9A INPUT A S/H OUTPUT • ADC CORE • 64 – DRIVERS • D0A 63 OGND 62 61 60 CLK A CLOCK/DUTY CYCLE CONTROL SNR (dBFS) 59 MUX 58 CLK B CLOCK/DUTY CYCLE 57 CONTROL 56 55 OVDD 0 50 100 150 200 D9B INPUT FREQUENCY (MHz) + OUTPUT • 10-BIT • ANALOG • 2280 TA02 INPUT DRIVERS PIPELINED INPUT B D0B S/H ADC CORE – OGND 2280 TA01 2280fa 1