Datasheet LTC2298, LTC2297, LTC2296 (Analog Devices) - 5
| 制造商 | Analog Devices |
| 描述 | Dual 14-Bit, 65Msps Low Power 3V ADCs |
| 页数 / 页 | 28 / 5 — POWER REQUIRE E TS The. denotes the specifications which apply over the … |
| 文件格式/大小 | PDF / 804 Kb |
| 文件语言 | 英语 |
POWER REQUIRE E TS The. denotes the specifications which apply over the full operating temperature
该数据表的模型线
- LTC2296CUP#PBF LTC2296CUP#PBF LTC2296CUP#TRPBF LTC2296CUP#TRPBF LTC2296IUP#PBF LTC2296IUP#PBF LTC2296IUP#TRPBF LTC2296IUP#TRPBF
文件文字版本
LTC2298/LTC2297/LTC2296
W U POWER REQUIRE E TS The
●
denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25
°
C. (Note 8) LTC2298 LTC2297 LTC2296 SYMBOL PARAMETER CONDITIONS MIN TYP MAX MIN TYP MAX MIN TYP MAX UNITS
VDD Analog Supply (Note 9) ● 2.7 3 3.4 2.7 3 3.4 2.7 3 3.4 V Voltage OVDD Output Supply (Note 9) ● 0.5 3 3.6 0.5 3 3.6 0.5 3 3.6 V Voltage IVDD Supply Current Both ADCs at fS(MAX) ● 133 150 78 95 50 60 mA PDISS Power Dissipation Both ADCs at fS(MAX) ● 400 450 235 285 150 180 mW PSHDN Shutdown Power SHDN = H, 2 2 2 mW (Each Channel) OE = H, No CLK PNAP Nap Mode Power SHDN = H, 15 15 15 mW (Each Channel) OE = L, No CLK
W U TI I G CHARACTERISTICS The
●
denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25
°
C. (Note 4) LTC2298 LTC2297 LTC2296 SYMBOL PARAMETER CONDITIONS MIN TYP MAX MIN TYP MAX MIN TYP MAX UNITS
fs Sampling Frequency (Note 9) ● 1 65 1 40 1 25 MHz tL CLK Low Time Duty Cycle Stabilizer Off ● 7.3 7.7 500 11.8 12.5 500 18.9 20 500 ns Duty Cycle Stabilizer On ● 5 7.7 500 5 12.5 500 5 20 500 ns (Note 7) tH CLK High Time Duty Cycle Stabilizer Off ● 7.3 7.7 500 11.8 12.5 500 18.9 20 500 ns Duty Cycle Stabilizer On ● 5 7.7 500 5 12.5 500 5 20 500 ns (Note 7) tAP Sample-and-Hold 0 0 0 ns Aperture Delay tD CLK to DATA Delay CL = 5pF (Note 7) ● 1.4 2.7 5.4 1.4 2.7 5.4 1.4 2.7 5.4 ns tMD MUX to DATA Delay CL = 5pF (Note 7) ● 1.4 2.7 5.4 1.4 2.7 5.4 1.4 2.7 5.4 ns Data Access Time CL = 5pF (Note 7) ● 4.3 10 4.3 10 4.3 10 ns After OE↓ BUS Relinquish Time (Note 7) ● 3.3 8.5 3.3 8.5 3.3 8.5 ns Pipeline 5 5 5 Cycles Latency
Note 1:
Stresses beyond those listed under Absolute Maximum Ratings
Note 5:
Integral nonlinearity is defined as the deviation of a code from a may cause permanent damage to the device. Exposure to any Absolute straight line passing through the actual endpoints of the transfer curve. Maximum Rating condition for extended periods may affect device The deviation is measured from the center of the quantization band. reliability and lifetime.
Note 6:
Offset error is the offset voltage measured from –0.5 LSB when
Note 2:
All voltage values are with respect to ground with GND and OGND the output code flickers between 00 0000 0000 0000 and wired together (unless otherwise noted). 11 1111 1111 1111.
Note 3:
When these pin voltages are taken below GND or above VDD, they
Note 7:
Guaranteed by design, not subject to test. will be clamped by internal diodes. This product can handle input currents
Note 8:
VDD = 3V, fSAMPLE = 65MHz (LTC2298), 40MHz (LTC2297), or of greater than 100mA below GND or above VDD without latchup. 25MHz (LTC2296), input range = 1VP-P with differential drive. The supply
Note 4:
VDD = 3V, fSAMPLE = 65MHz (LTC2298), 40MHz (LTC2297), or current and power dissipation are the sum total for both channels with 25MHz (LTC2296), input range = 2VP-P with differential drive, unless both channels active. otherwise noted.
Note 9:
Recommended operating conditions. 229876fa 5
W U POWER REQUIRE E TS The
●
denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25
°
C. (Note 8) LTC2298 LTC2297 LTC2296 SYMBOL PARAMETER CONDITIONS MIN TYP MAX MIN TYP MAX MIN TYP MAX UNITS
VDD Analog Supply (Note 9) ● 2.7 3 3.4 2.7 3 3.4 2.7 3 3.4 V Voltage OVDD Output Supply (Note 9) ● 0.5 3 3.6 0.5 3 3.6 0.5 3 3.6 V Voltage IVDD Supply Current Both ADCs at fS(MAX) ● 133 150 78 95 50 60 mA PDISS Power Dissipation Both ADCs at fS(MAX) ● 400 450 235 285 150 180 mW PSHDN Shutdown Power SHDN = H, 2 2 2 mW (Each Channel) OE = H, No CLK PNAP Nap Mode Power SHDN = H, 15 15 15 mW (Each Channel) OE = L, No CLK
W U TI I G CHARACTERISTICS The
●
denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25
°
C. (Note 4) LTC2298 LTC2297 LTC2296 SYMBOL PARAMETER CONDITIONS MIN TYP MAX MIN TYP MAX MIN TYP MAX UNITS
fs Sampling Frequency (Note 9) ● 1 65 1 40 1 25 MHz tL CLK Low Time Duty Cycle Stabilizer Off ● 7.3 7.7 500 11.8 12.5 500 18.9 20 500 ns Duty Cycle Stabilizer On ● 5 7.7 500 5 12.5 500 5 20 500 ns (Note 7) tH CLK High Time Duty Cycle Stabilizer Off ● 7.3 7.7 500 11.8 12.5 500 18.9 20 500 ns Duty Cycle Stabilizer On ● 5 7.7 500 5 12.5 500 5 20 500 ns (Note 7) tAP Sample-and-Hold 0 0 0 ns Aperture Delay tD CLK to DATA Delay CL = 5pF (Note 7) ● 1.4 2.7 5.4 1.4 2.7 5.4 1.4 2.7 5.4 ns tMD MUX to DATA Delay CL = 5pF (Note 7) ● 1.4 2.7 5.4 1.4 2.7 5.4 1.4 2.7 5.4 ns Data Access Time CL = 5pF (Note 7) ● 4.3 10 4.3 10 4.3 10 ns After OE↓ BUS Relinquish Time (Note 7) ● 3.3 8.5 3.3 8.5 3.3 8.5 ns Pipeline 5 5 5 Cycles Latency
Note 1:
Stresses beyond those listed under Absolute Maximum Ratings
Note 5:
Integral nonlinearity is defined as the deviation of a code from a may cause permanent damage to the device. Exposure to any Absolute straight line passing through the actual endpoints of the transfer curve. Maximum Rating condition for extended periods may affect device The deviation is measured from the center of the quantization band. reliability and lifetime.
Note 6:
Offset error is the offset voltage measured from –0.5 LSB when
Note 2:
All voltage values are with respect to ground with GND and OGND the output code flickers between 00 0000 0000 0000 and wired together (unless otherwise noted). 11 1111 1111 1111.
Note 3:
When these pin voltages are taken below GND or above VDD, they
Note 7:
Guaranteed by design, not subject to test. will be clamped by internal diodes. This product can handle input currents
Note 8:
VDD = 3V, fSAMPLE = 65MHz (LTC2298), 40MHz (LTC2297), or of greater than 100mA below GND or above VDD without latchup. 25MHz (LTC2296), input range = 1VP-P with differential drive. The supply
Note 4:
VDD = 3V, fSAMPLE = 65MHz (LTC2298), 40MHz (LTC2297), or current and power dissipation are the sum total for both channels with 25MHz (LTC2296), input range = 2VP-P with differential drive, unless both channels active. otherwise noted.
Note 9:
Recommended operating conditions. 229876fa 5