LTC2302/LTC2306 TiMing cHaracTerisTicsThe l denotes the specifications which apply over the full operating temperaturerange, otherwise specifications are at TA = 25°C. (Note 4) SYMBOLPARAMETERCONDITIONSMINTYPMAXUNITS fSMPL(MAX) Maximum Sampling Frequency l 500 kHz fSCK Shift Clock Frequency l 40 MHz tWHCONV CONVST High Time (Note 9) l 20 ns tHD Hold Time SDI After SCK↑ l 2.5 ns tSUDI Setup Time SDI Stable Before SCK↑ l 0 ns tWHCLK SCK High Time fSCK = fSCK(MAX) l 10 ns tWLCLK SCK Low Time fSCK = fSCK(MAX) l 10 ns tWLCONVST CONVST Low Time During Data Transfer (Note 9) l 410 ns tHCONVST Hold Time CONVST Low After Last SCK↓ (Note 9) l 20 ns tCONV Conversion Time l 1.3 1.6 µs tACQ Acquisition Time 7th SCK↑ to CONVST↑ (Note 9) l 240 ns tdDO SDO Data Valid After SCK↓ CL = 25pF (Note 9) l 10.8 12.5 ns thDO SDO Hold Time SCK↓ CL = 25pF l 4 ns ten SDO Valid After CONVST↓ CL = 25pF l 11 15 ns tdis Bus Relinquish Time CL = 25pF l 11 15 ns tr SDO Rise Time CL = 25pF 4 ns tf SDO Fall Time CL = 25pF 4 ns tCYC Total Cycle Time 2 µs Note 1: Stresses beyond those listed under Absolute Maximum Ratings Note 7: Bipolar zero error is the offset voltage measured from –0.5LSB may cause permanent damage to the device. Exposure to any Absolute when the output code flickers between 0000 0000 0000 and 1111 1111 Maximum Rating condition for extended periods may affect device 1111. Unipolar zero error is the offset voltage measured from +0.5LSB reliability and lifetime. when the output code flickers between 0000 0000 0000 and 0000 0000 Note 2: All voltage values are with respect to ground with V 0001. DD and OVDD wired together (unless otherwise noted). Note 8: Full‑scale bipolar error is the worst‑case of –FS or +FS untrimmed Note 3: When these pin voltages are taken below ground or above V deviation from ideal first and last code transitions and includes the effect DD, they will be clamped by internal diodes. These products can handle input of offset error. Unipolar full‑scale error is the deviation of the last code currents greater than 100mA below ground or above V transition from ideal and includes the effect of offset error. DD without latchup. Note 4: V Note 9: Guaranteed by design, not subject to test. DD = 5V, OVDD = 5V, VREF = 4.096V, fSMPL = 500ksps, unless otherwise specified. Note 10: All specifications in dB are referred to a full‑scale ±2.048V input Note 5: Linearity, offset and full‑scale specifications apply for a single‑ with a 4.096V reference voltage. ended analog input with respect to GND for the LTC2306 and IN+ with Note 11: Full linear bandwidth is defined as the full‑scale input frequency respect to IN– tied to GND for the LTC2302. at which the SINAD degrades to 60dB or 10 bits of accuracy. Note 6: Integral nonlinearity is defined as the deviation of a code from a straight line passing through the actual endpoints of the transfer curve. The deviation is measured from the center of the quantization band. 23026fb For more information www.linear.com/LTC2302 5 Document Outline Features Description Applications Typical Application Absolute Maximum Ratings Typical Performance Characteristics Pin Functions Block Diagram Applications Information Typical Applications Package Description Related Parts