Datasheet LTC2308 (Analog Devices) - 8
| 制造商 | Analog Devices |
| 描述 | Low Noise, 500ksps, 8-Channel, 12-Bit ADC |
| 页数 / 页 | 22 / 8 — PIN FUNCTIONS. CH3-CH7 (Pins 1, 2, 3, 4, 5):. SDI (Pin 15):. SCK (Pin … |
| 文件格式/大小 | PDF / 679 Kb |
| 文件语言 | 英语 |
PIN FUNCTIONS. CH3-CH7 (Pins 1, 2, 3, 4, 5):. SDI (Pin 15):. SCK (Pin 16):. COM (Pin 6):. SDO (Pin 17):. VREF (Pin 7):. DD (Pin 19):
该数据表的模型线
文件文字版本
LTC2308
PIN FUNCTIONS CH3-CH7 (Pins 1, 2, 3, 4, 5):
Channel 3 to Channel 7
SDI (Pin 15):
Serial Data Input. The SDI serial bit stream Analog Inputs. CH3-CH7 can be configured as single- configures the ADC and is latched on the rising edge of ended or differential input channels. See the Analog Input the first 6 SCK pulses. Multiplexer section.
SCK (Pin 16):
Serial Data Clock. SCK synchronizes the
COM (Pin 6):
Common Input. This is the reference point serial data transfer. The serial data input at SDI is latched for all single-ended inputs. It must be free of noise and on the rising edge of SCK. The serial data output at SDO connected to ground for unipolar conversions and midway transitions on the falling edge of SCK. between GND and REFCOMP for bipolar conversions.
SDO (Pin 17):
Serial Data Out. SDO outputs the data from
VREF (Pin 7):
2.5V Reference Output. Bypass to GND with the previous conversion. SDO is shifted out serially on the a minimum 2.2µF tantalum capacitor or low ESR ceramic falling edge of each SCK pulse. capacitor. The internal reference may be over driven by an
OV
external 2.5V reference at this pin.
DD (Pin 19):
Output Driver Supply. Bypass OVDD to GND with a 0.1µF ceramic capacitor close to the pin. The
REFCOMP (Pin 8):
Reference Buffer Output. Bypass to range of OVDD is 2.7V to 5.25V. GND with a 10µF tantalum and 0.1µF ceramic capacitor
DV
in parallel. Nominal output voltage is 4.096V. The internal
DD (Pin 21):
5V Digital Supply. The range of DVDD is 4.75V to 5.25V. Bypass DV reference buffer driving this pin is disabled by grounding DD to GND with a 0.1 µF ceramic and a 10µF tantalum capacitor in parallel. VREF , allowing REFCOMP to be overdriven by an external source (see Figure 6c).
CH0-CH2 (Pins 22, 23, 24):
Channel 0 to Channel 2 Analog Inputs. CH0-CH2 can be configured as single-
GND (Pins 9, 10, 11, 18, 20):
Ground. All GND pins must ended or differential input channels. See the Analog Input be connected to a solid ground plane. Multiplexer section.
AVDD (Pins 12, 13):
5V Analog Supply. The range of AVDD is
GND (Pin 25):
Exposed Pad Ground. Must be soldered 4.75V to 5.25V. Bypass AVDD to GND with a 0.1µF ceramic directly to ground plane. and a 10µF tantalum capacitor in parallel.
CONVST (Pin 14):
Conversion Start. A rising edge at CONVST begins a conversion. For best performance, ensure that CONVST returns low within 40ns after the conversion starts or after the conversion ends. 2308fc 8 For more information www.linear.com/LTC2308
PIN FUNCTIONS CH3-CH7 (Pins 1, 2, 3, 4, 5):
Channel 3 to Channel 7
SDI (Pin 15):
Serial Data Input. The SDI serial bit stream Analog Inputs. CH3-CH7 can be configured as single- configures the ADC and is latched on the rising edge of ended or differential input channels. See the Analog Input the first 6 SCK pulses. Multiplexer section.
SCK (Pin 16):
Serial Data Clock. SCK synchronizes the
COM (Pin 6):
Common Input. This is the reference point serial data transfer. The serial data input at SDI is latched for all single-ended inputs. It must be free of noise and on the rising edge of SCK. The serial data output at SDO connected to ground for unipolar conversions and midway transitions on the falling edge of SCK. between GND and REFCOMP for bipolar conversions.
SDO (Pin 17):
Serial Data Out. SDO outputs the data from
VREF (Pin 7):
2.5V Reference Output. Bypass to GND with the previous conversion. SDO is shifted out serially on the a minimum 2.2µF tantalum capacitor or low ESR ceramic falling edge of each SCK pulse. capacitor. The internal reference may be over driven by an
OV
external 2.5V reference at this pin.
DD (Pin 19):
Output Driver Supply. Bypass OVDD to GND with a 0.1µF ceramic capacitor close to the pin. The
REFCOMP (Pin 8):
Reference Buffer Output. Bypass to range of OVDD is 2.7V to 5.25V. GND with a 10µF tantalum and 0.1µF ceramic capacitor
DV
in parallel. Nominal output voltage is 4.096V. The internal
DD (Pin 21):
5V Digital Supply. The range of DVDD is 4.75V to 5.25V. Bypass DV reference buffer driving this pin is disabled by grounding DD to GND with a 0.1 µF ceramic and a 10µF tantalum capacitor in parallel. VREF , allowing REFCOMP to be overdriven by an external source (see Figure 6c).
CH0-CH2 (Pins 22, 23, 24):
Channel 0 to Channel 2 Analog Inputs. CH0-CH2 can be configured as single-
GND (Pins 9, 10, 11, 18, 20):
Ground. All GND pins must ended or differential input channels. See the Analog Input be connected to a solid ground plane. Multiplexer section.
AVDD (Pins 12, 13):
5V Analog Supply. The range of AVDD is
GND (Pin 25):
Exposed Pad Ground. Must be soldered 4.75V to 5.25V. Bypass AVDD to GND with a 0.1µF ceramic directly to ground plane. and a 10µF tantalum capacitor in parallel.
CONVST (Pin 14):
Conversion Start. A rising edge at CONVST begins a conversion. For best performance, ensure that CONVST returns low within 40ns after the conversion starts or after the conversion ends. 2308fc 8 For more information www.linear.com/LTC2308