LTC2309 I2 C tIMInG CHARACteRIstICs The l denotes the specifications which apply over the full operatingtemperature range, otherwise specifications are at TA = 25°C. (Note 4) SYMBOL PARAMETERCONDITIONSMINTYPMAXUNITS fSCL SCL Clock Frequency l 400 kHz tHD(SDA) Hold Time (Repeated) START Condition l 0.6 µs tLOW LOW Period of the SCL Pin l 1.3 µs tHIGH HIGH Period of the SCL Pin l 0.6 µs tSU(STA) Set-Up Time for a Repeated START Condition l 0.6 µs tHD(DAT) Data Hold Time l 0 0.9 µs tSU(DAT) Data Set-Up Time l 100 ns tr Rise Time for SDA/SCL Signals (Note 12) l 20 + 0.1CB 300 ns tf Fall Time for SDA/SCL Signals (Note 12) l 20 + 0.1CB 300 ns tSU(STO) Set-Up Time for STOP Condition l 0.6 µs tBUF Bus Free Time Between a STOP and START Condition l 1.3 µs A DC tIMInG CHARACteRIstICs The l denotes the specifications which apply over the full operatingtemperature range, otherwise specifications are at TA = 25°C. (Note 4) SYMBOL PARAMETERCONDITIONSMINTYPMAXUNITS fSMPL Throughput Rate (Successive Reads) l 14 ksps tCONV Conversion Time (Note 9) l 1.3 1.8 µs tACQ Acquisition Time (Note 9) l 240 ns tREFWAKE REFCOMP Wake-Up Time (Note 13) CREFCOMP = 10µF, CREF = 2.2µF 200 ms Note 1: Stresses beyond those listed under Absolute Maximum Ratings 1111. Unipolar zero error is the offset voltage measured from +0.5LSB may cause permanent damage to the device. Exposure to any Absolute when the output code flickers between 0000 0000 0000 and 0000 0000 Maximum Rating condition for extended periods may affect device 0001. reliability and lifetime. Note 8: Full-scale bipolar error is the worst-case of –FS or +FS untrimmed Note 2: All voltage values are with respect to ground. deviation from ideal first and last code transitions and includes the effect Note 3: When these pin voltages are taken below ground or above V of offset error. Unipolar full-scale error is the deviation of the last code DD, they will be clamped by internal diodes. These products can handle input transition from ideal and includes the effect of offset error. currents greater than 100mA below ground or above VDD without latchup. Note 9: Guaranteed by design, not subject to test. Note 4: VDD = 5V, fSMPL = 14ksps internal reference unless otherwise Note 10: All specifications in dB are referred to a full-scale ±2.048V input noted. with a 2.5V reference voltage. Note 5: Linearity, offset and full-scale specifications apply for a Note 11: Full linear bandwidth is defined as the full-scale input frequency single-ended analog input with respect to COM. at which the SINAD degrades to 60dB or 10 bits of accuracy. Note 6: Integral nonlinearity is defined as the deviation of a code from a Note 12: CB = capacitance of one bus line in pF (10pF ≤ CB ≤ 400pF). straight line passing through the actual endpoints of the transfer curve. Note 13: REFCOMP wake-up time is the time required for the REFCOMP The deviation is measured from the center of the quantization band. pin to settle within 0.5LSB at 12-bit resolution of its final value after Note 7: Bipolar zero error is the offset voltage measured from –0.5LSB waking up from SLEEP mode. when the output code flickers between 0000 0000 0000 and 1111 1111 2309fd Document Outline Features Description Applications Absolute Maximum Ratings Pin Configuration Order Information CONVERTER AND MULTIPLEXER CHARACTERISTICS ANALOG INPUT DYNAMIC ACCURACY INTERNAL REFERENCE CHARACTERISTICS I2C Inputs and Digital Outputs POWER REQUIREMENTS I2C TIMING CHARACTERISTICS ADC TIMING CHARACTERISTICS Typical Performance Characteristics Pin Functions Functional Block Diagram TIMING DIAGRAM Applications Information Package Description Revision History Typical Application Related Parts