Datasheet LTC2311-12 (Analog Devices) - 5
| 制造商 | Analog Devices |
| 描述 | 12-Bit + Sign, 5Msps Differential Input ADC with Wide Input Common Mode Range |
| 页数 / 页 | 24 / 5 — p ower requireMenTs The. denotes the specifications which apply over the … |
| 文件格式/大小 | PDF / 538 Kb |
| 文件语言 | 英语 |
p ower requireMenTs The. denotes the specifications which apply over the full operating temperature
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文件文字版本
LTC2311-12
p ower requireMenTs The
l
denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C (Note 4). SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
VDD Supply Voltage 5V Operation l 4.75 5.25 V 3.3V Operation l 3.13 3.47 V OVDD Supply Voltage l 1.71 2.63 V IVDD Supply Current 5Msps Sample Rate (AIN+ = AIN– = 0V) l 8.8 12 mA INAP Nap Mode Current Conversion Done (IVDD) l 2.4 3.5 mA ISLEEP Sleep Mode Current VDD = 3.3V, Sleep Mode (IVDD + IOVDD) l 0.1 10 μA
CMOS I/O Mode
IOVDD Supply Current 5Msps Sample Rate (CL = 5pF) l 1.1 1.5 mA PD_3.3V Power Dissipation VDD = 3.3V 5Msps Sample Rate (AIN+ = AIN– = 0V) 27 mW Nap Mode VDD = 3.3V Conversion Done (IVDD + IOVDD) 7.5 mW Sleep Mode VDD = 3.3V Sleep Mode (IVDD + IOVDD) 0.3 μW PD_5V Power Dissipation VDD = 5V 5Msps Sample Rate (AIN+ = AIN– = 0V) l 50 65 mW Nap Mode VDD = 5V Conversion Done (IVDD + IOVDD) l 12 18 mW Sleep Mode VDD = 5V Sleep Mode (IVDD + IOVDD) l 0.5 30 μW
LVDS I/O Mode
IOVDD Supply Current 5Msps Sample Rate (RL = 100Ω) l 2.5 3.5 mA PD_3.3V Power Dissipation VDD = 3.3V 5Msps Sample Rate (AIN+ = AIN– = 0V) 33 mW Nap Mode VDD = 3.3V Conversion Done (IVDD + IOVDD) 14 mW Sleep Mode VDD = 3.3V Sleep Mode (IVDD + IOVDD) 0.3 µW PD_5V Power Dissipation VDD = 5V 5Msps Sample Rate (AIN+ = AIN– = 0V) l 58 65 mW Nap Mode VDD = 5V Conversion Done (IVDD + IOVDD) l 18 25 mW Sleep Mode VDD = 5V Sleep Mode (IVDD + IOVDD) l 0.5 20 µW
a Dc TiMing characTerisTics The
l
denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C (Note 4). SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS CMOS, LVDS I/O Modes
fSMPL Maximum Sampling Frequency l 5 Msps tCYC Time Between Conversions (Note 11) l 200 1000000 ns tACQ Acquisition Time (Note 11) l 38.1 ns tCONV Conversion Time l 161.9 ns tCNVH CNV High Time l 25 ns tDCNVSCKL SCK Quiet Time from CNV↓ (Note 11) l 10 ns tDSCKLCNVH SCK Delay Time to CNV↑ (Note 11) l 20 ns tSCK SCK Period (Notes 12, 13) l 9.4 ns tSCKH SCK High Time l 4 ns tSCKL SCK Low Time l 4 ns 231112f For more information www.linear.com/LTC2311-12 5 Document Outline Features Applications Description Typical Application Absolute Maximum Ratings Pin Configuration Electrical Characteristics Converter Characteristics Dynamic Accuracy Internal Reference Characteristics Digital Inputs And Digital Outputs Power Requirements ADC Timing Characteristics Typical Performance Characteristics Functional Block Diagram Timing Diagram Applications Information Package Description Typical Application Related Parts
p ower requireMenTs The
l
denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C (Note 4). SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
VDD Supply Voltage 5V Operation l 4.75 5.25 V 3.3V Operation l 3.13 3.47 V OVDD Supply Voltage l 1.71 2.63 V IVDD Supply Current 5Msps Sample Rate (AIN+ = AIN– = 0V) l 8.8 12 mA INAP Nap Mode Current Conversion Done (IVDD) l 2.4 3.5 mA ISLEEP Sleep Mode Current VDD = 3.3V, Sleep Mode (IVDD + IOVDD) l 0.1 10 μA
CMOS I/O Mode
IOVDD Supply Current 5Msps Sample Rate (CL = 5pF) l 1.1 1.5 mA PD_3.3V Power Dissipation VDD = 3.3V 5Msps Sample Rate (AIN+ = AIN– = 0V) 27 mW Nap Mode VDD = 3.3V Conversion Done (IVDD + IOVDD) 7.5 mW Sleep Mode VDD = 3.3V Sleep Mode (IVDD + IOVDD) 0.3 μW PD_5V Power Dissipation VDD = 5V 5Msps Sample Rate (AIN+ = AIN– = 0V) l 50 65 mW Nap Mode VDD = 5V Conversion Done (IVDD + IOVDD) l 12 18 mW Sleep Mode VDD = 5V Sleep Mode (IVDD + IOVDD) l 0.5 30 μW
LVDS I/O Mode
IOVDD Supply Current 5Msps Sample Rate (RL = 100Ω) l 2.5 3.5 mA PD_3.3V Power Dissipation VDD = 3.3V 5Msps Sample Rate (AIN+ = AIN– = 0V) 33 mW Nap Mode VDD = 3.3V Conversion Done (IVDD + IOVDD) 14 mW Sleep Mode VDD = 3.3V Sleep Mode (IVDD + IOVDD) 0.3 µW PD_5V Power Dissipation VDD = 5V 5Msps Sample Rate (AIN+ = AIN– = 0V) l 58 65 mW Nap Mode VDD = 5V Conversion Done (IVDD + IOVDD) l 18 25 mW Sleep Mode VDD = 5V Sleep Mode (IVDD + IOVDD) l 0.5 20 µW
a Dc TiMing characTerisTics The
l
denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C (Note 4). SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS CMOS, LVDS I/O Modes
fSMPL Maximum Sampling Frequency l 5 Msps tCYC Time Between Conversions (Note 11) l 200 1000000 ns tACQ Acquisition Time (Note 11) l 38.1 ns tCONV Conversion Time l 161.9 ns tCNVH CNV High Time l 25 ns tDCNVSCKL SCK Quiet Time from CNV↓ (Note 11) l 10 ns tDSCKLCNVH SCK Delay Time to CNV↑ (Note 11) l 20 ns tSCK SCK Period (Notes 12, 13) l 9.4 ns tSCKH SCK High Time l 4 ns tSCKL SCK Low Time l 4 ns 231112f For more information www.linear.com/LTC2311-12 5 Document Outline Features Applications Description Typical Application Absolute Maximum Ratings Pin Configuration Electrical Characteristics Converter Characteristics Dynamic Accuracy Internal Reference Characteristics Digital Inputs And Digital Outputs Power Requirements ADC Timing Characteristics Typical Performance Characteristics Functional Block Diagram Timing Diagram Applications Information Package Description Typical Application Related Parts