Datasheet LTC2313-12 (Analog Devices) - 10

LTC2313-12
APPLICATIONS INFORMATION Overview Serial Data Output (SDO)
The LTC2313-12 is a low noise, high speed, 12-bit succes- The SDO output is always forced into the high imped- sive approximation register (SAR) ADC. The LTC2313-12 ance state while CONV is high. The falling edge of CONV operates from a single 3V or 5V supply and provides a enables SDO and also places the sample and hold into low drift (20ppm/°C maximum), internal reference and sample mode. The A/D conversion result is shifted out reference buffer. The internal reference buffer is automati- on the SDO pin as a serial data stream with the MSB first. cally configured with a 2.048V span in low supply range The MSB is output on SDO on the falling edge of CONV. (2.7V to 3.6V) and with a 4.096V span in the high supply Delay t3 is the data valid access time for the MSB. The range (4.75V to 5.25V). The LTC2313-12 samples up to following 11 bits of conversion data are shifted out on a 2.5Msps rate and supports a 90MHz serial data read SDO on the falling edge of SCK. Delay t4 is the data valid clock. The LTC2313-12 achieves excellent dynamic per- access time for output data shifted out on the falling edge formance (72.6dB SINAD, –84dB THD) while dissipating of SCK. There is no data latency. Subsequent falling SCK only 25mW from a 5V supply at the 2.5Msps conversion edges applied after the LSB is output will output zeros rate. The LTC2313-12 outputs the conversion data with indefinitely on the SDO pin. no cycle latency onto the SDO pin. The SDO pin output The output swing on the SDO pin is controlled by the logic levels are supplied by the dedicated OVDD supply pin OV which has a wide supply range (1.71V to 5.25V) allowing DD pin voltage and supports a wide operating range from 1.71V to 5.25V independent of the V the LTC2313-12 to communicate with 1.8V, 2.5V, 3V or 5V DD pin voltage. systems. The LTC2313-12 automatically switches to nap
Power Considerations
mode following the conversion process to save power. The device also provides a sleep power-down mode through The LTC2313-12 provides two sets of power supply pins: serial interface control to reduce power dissipation during the analog power supply (VDD) and the digital input/output long inactive periods. interface power supply (OVDD). The flexible OVDD supply allows the LTC2313-12 to communicate with any digital
Serial Interface
logic operating between 1.8V and 5V, including 2.5V and 3.3V systems. The LTC2313-12 communicates with microcontrollers, DSPs and other external circuitry via a 3-wire interface. A
Entering Nap/Sleep Mode
rising CONV edge starts the conversion process which is timed via an internal oscillator. Following the conversion Pulsing CONV two times and holding SCK static places the process the device automatically switches to nap mode LTC2313-12 into nap mode. Pulsing CONV four times and to save power as shown in Figure 7. This feature saves holding SCK static places the LTC2313-12 into sleep mode. considerable power for the LTC2313-12 operating at In sleep mode, all bias circuitry is shut down, including the lower sampling rates. As shown in Figures 5 and 6, it is internal bandgap and reference buffer, and only leakage recommended to hold SCK static low or high during t currents remain (0.2µA typical). Because the reference CONV. A falling CONV edge enables SDO and outputs the MSB. buffer is externally bypassed with a large capacitor (2.2µF), Subsequent SCK falling edges clock out the remaining data the LTC2313-12 requires a significant wait time (1.1ms) to as shown in Figures 5 and 6. CONV must be held high for recharge this capacitance before an accurate conversion the minimum conversion time, t can be made. In contrast, nap mode does not power down CONV(MIN).Data is serially output MSB first through LSB last, followed by trailing the internal bandgap or reference buffer allowing for a fast zeros if further SCK falling edges are applied. wake-up and accurate conversion within one conversion clock cycle. Supply current during nap mode is nominally 2mA. 231312fb 10 For more information www.linear.com/LTC2313-12 Document Outline Features Description Applications Typical Application Absolute Maximum Ratings Pin Configuration Order Information Electrical Characteristics Converter Characteristics Dynamic Accuracy Reference Input/Output Digital Inputs And Digital Outputs Power Requirements ADC Timing Characteristics Typical Performance Characteristics Pin Functions Block Diagram Timing Diagrams Applications Information Package Description Related Parts Features Applications Typical Application Description Absolute Maximum Ratings Order Information Pin Configuration Electrical Characteristics Converter Characteristics Dynamic Accuracy Reference Input/Output Digital Inputs and Digital Outputs Power Requirements ADC Timing Characteristics Typical Performance Characteristics Pin Functions Block Diagram Timing Diagrams Applications Information Applications Information Applications Information Applications Information Applications Information Package Description Revision History Typical Application Related Parts