Datasheet LTC2326-18 (Analog Devices)
| 制造商 | Analog Devices |
| 描述 | 18-Bit, 250ksps, ±10.24V True Bipolar, Pseudo-Differential Input ADC with 95dB SNR |
| 页数 / 页 | 26 / 1 — FeaTures. DescripTion. 250ksps Throughput Rate. ±5LSB INL (Max). … |
| 文件格式/大小 | PDF / 518 Kb |
| 文件语言 | 英语 |
FeaTures. DescripTion. 250ksps Throughput Rate. ±5LSB INL (Max). Guaranteed 18-Bit No Missing Codes. Pseudo-Differential Inputs
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LTC2326-18 18-Bit, 250ksps, ±10.24V True Bipolar, Pseudo-Differential Input ADC with 95dB SNR
FeaTures DescripTion
n
250ksps Throughput Rate
The LTC®2326-18 is a low noise, high speed 18-bit suc- n
±5LSB INL (Max)
cessive approximation register (SAR) ADC with pseudo- n
Guaranteed 18-Bit No Missing Codes
differential inputs. Operating from a single 5V supply, n
Pseudo-Differential Inputs
the LTC2326-18 has a ±10.24V true bipolar input range, n
True Bipolar Input Ranges ±6.25V, ±10.24V, ±12.5V
making it ideal for high voltage applications which require n
95dB SNR (Typ) at fIN = 2kHz
a wide dynamic range. The LTC2326-18 achieves ±5LSB n
–111dB THD (Typ) at fIN = 2kHz
INL maximum, no missing codes at 18 bits with 95dB SNR. n Guaranteed Operation to 125°C The LTC2326-18 has an onboard single-shot capable n Single 5V Supply reference buffer and low drift (20ppm/°C max) 2.048V n Low Drift (20ppm/°C Max) 2.048V Internal Reference temperature compensated reference. The LTC2326-18 n Onboard Single-Shot Capable Reference Buffer also has a high speed SPI-compatible serial interface that n No Pipeline Delay, No Cycle Latency supports 1.8V, 2.5V, 3.3V and 5V logic while also featuring n 1.8V to 5V I/O Voltages a daisy-chain mode. The fast 250ksps throughput with n SPI-Compatible Serial I/O with Daisy-Chain Mode no cycle latency makes the LTC2326-18 ideally suited n Internal Conversion Clock for a wide variety of high speed applications. An internal n Power Dissipation 28mW (Typ) oscillator sets the conversion time, easing external timing n 16-Lead MSOP Package considerations. The LTC2326-18 dissipates only 28mW and automatically naps between conversions, leading to
applicaTions
reduced power dissipation that scales with the sampling n Programmable Logic Controllers rate. A sleep mode is also provided to reduce the power n Industrial Process Control consumption of the LTC2326-18 to 300μW for further n High Speed Data Acquisition power savings during inactive periods. n Portable or Compact Instrumentation L, LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks and SoftSpan is a trademark of Linear Technology Corporation. All other trademarks are the n ATE property of their respective owners. Protected by U.S. Patents, including 7705765, 7961132.
Typical applicaTion 32k Point FFT fS = 250ksps, fIN = 2kHz
0 5V 1.8V TO 5V SNR = 95.3dB –20 THD = –113dB SINAD = 95.2dB 10µF 2.2µF 0.1µF –40 SFDR = –117dB +10.24V –60 + VDD VDDLBYP OVDD –10.24V CHAIN –80 LT®1468 IN+ RDL/SDI – SDO –100 LTC2326-18 SCK –120 IN– BUSY AMPLITUDE (dBFS) CNV SAMPLE CLOCK REF REFBUF REFIN GND –140 232618 TA01 –160 47µF 100nF –180 0 25 50 75 100 125 FREQUENCY (kHz) 232618 TA01b 232618fb For more information www.linear.com/LTC2326-18 1 Document Outline Features Applications Typical Application Description Absolute Maximum Ratings Order Information Pin Configuration Electrical Characteristics Converter Characteristics Dynamic Accuracy Internal Reference Characteristics Reference Buffer Characteristics Digital Inputs and Digital Outputs Power Requirements ADC Timing Characteristics Typical Performance Characteristics Pin Functions Functional Block Diagram Timing Diagram Applications Information Board Layout Package Description Revision History Typical Application Related Parts
FeaTures DescripTion
n
250ksps Throughput Rate
The LTC®2326-18 is a low noise, high speed 18-bit suc- n
±5LSB INL (Max)
cessive approximation register (SAR) ADC with pseudo- n
Guaranteed 18-Bit No Missing Codes
differential inputs. Operating from a single 5V supply, n
Pseudo-Differential Inputs
the LTC2326-18 has a ±10.24V true bipolar input range, n
True Bipolar Input Ranges ±6.25V, ±10.24V, ±12.5V
making it ideal for high voltage applications which require n
95dB SNR (Typ) at fIN = 2kHz
a wide dynamic range. The LTC2326-18 achieves ±5LSB n
–111dB THD (Typ) at fIN = 2kHz
INL maximum, no missing codes at 18 bits with 95dB SNR. n Guaranteed Operation to 125°C The LTC2326-18 has an onboard single-shot capable n Single 5V Supply reference buffer and low drift (20ppm/°C max) 2.048V n Low Drift (20ppm/°C Max) 2.048V Internal Reference temperature compensated reference. The LTC2326-18 n Onboard Single-Shot Capable Reference Buffer also has a high speed SPI-compatible serial interface that n No Pipeline Delay, No Cycle Latency supports 1.8V, 2.5V, 3.3V and 5V logic while also featuring n 1.8V to 5V I/O Voltages a daisy-chain mode. The fast 250ksps throughput with n SPI-Compatible Serial I/O with Daisy-Chain Mode no cycle latency makes the LTC2326-18 ideally suited n Internal Conversion Clock for a wide variety of high speed applications. An internal n Power Dissipation 28mW (Typ) oscillator sets the conversion time, easing external timing n 16-Lead MSOP Package considerations. The LTC2326-18 dissipates only 28mW and automatically naps between conversions, leading to
applicaTions
reduced power dissipation that scales with the sampling n Programmable Logic Controllers rate. A sleep mode is also provided to reduce the power n Industrial Process Control consumption of the LTC2326-18 to 300μW for further n High Speed Data Acquisition power savings during inactive periods. n Portable or Compact Instrumentation L, LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks and SoftSpan is a trademark of Linear Technology Corporation. All other trademarks are the n ATE property of their respective owners. Protected by U.S. Patents, including 7705765, 7961132.
Typical applicaTion 32k Point FFT fS = 250ksps, fIN = 2kHz
0 5V 1.8V TO 5V SNR = 95.3dB –20 THD = –113dB SINAD = 95.2dB 10µF 2.2µF 0.1µF –40 SFDR = –117dB +10.24V –60 + VDD VDDLBYP OVDD –10.24V CHAIN –80 LT®1468 IN+ RDL/SDI – SDO –100 LTC2326-18 SCK –120 IN– BUSY AMPLITUDE (dBFS) CNV SAMPLE CLOCK REF REFBUF REFIN GND –140 232618 TA01 –160 47µF 100nF –180 0 25 50 75 100 125 FREQUENCY (kHz) 232618 TA01b 232618fb For more information www.linear.com/LTC2326-18 1 Document Outline Features Applications Typical Application Description Absolute Maximum Ratings Order Information Pin Configuration Electrical Characteristics Converter Characteristics Dynamic Accuracy Internal Reference Characteristics Reference Buffer Characteristics Digital Inputs and Digital Outputs Power Requirements ADC Timing Characteristics Typical Performance Characteristics Pin Functions Functional Block Diagram Timing Diagram Applications Information Board Layout Package Description Revision History Typical Application Related Parts