Datasheet LTC2341-16 (Analog Devices) - 6
| 制造商 | Analog Devices |
| 描述 | Dual, 16-Bit, 666ksps/ch Differential SoftSpan ADC with Wide Input Common Mode Range |
| 页数 / 页 | 38 / 6 — POWER REQUIREMENTS. The. denotes the specifications which apply over the … |
| 文件格式/大小 | PDF / 2.2 Mb |
| 文件语言 | 英语 |
POWER REQUIREMENTS. The. denotes the specifications which apply over the full operating temperature
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LTC2341-16
POWER REQUIREMENTS The
l
denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. (Note 8) SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS CMOS I/O Mode
VDD Supply Voltage l 4.75 5.00 5.25 V OVDD Supply Voltage l 1.71 5.25 V IVDD Supply Current 666ksps Sample Rate, 2 Channels Enabled l 13.7 16.0 mA 666ksps Sample Rate, 2 Channels Enabled, VREFBUF = 5V (Note 14) l 12.3 14.8 mA Acquisition Mode l 1.2 2.0 mA Power Down Mode (C-Grade and I-Grade) l 65 225 μA Power Down Mode (H-Grade) l 65 500 µA IOVDD Supply Current 666ksps Sample Rate, 2 Channels Enabled (CL = 25pF) l 2.2 3.4 mA Acquisition Mode l 1 20 μA Power Down Mode l 1 20 μA PD Power Dissipation 666ksps Sample Rate, 2 Channels Enabled l 74 89 mW Acquisition Mode l 6.0 10 mW Power Down Mode (C-Grade and I-Grade) l 0.33 1.2 mW Power Down Mode (H-Grade) l 0.33 2.6 mW
LVDS I/O Mode
VDD Supply Voltage l 4.75 5.00 5.25 V OVDD Supply Voltage l 2.375 5.25 V IVDD Supply Current 666ksps Sample Rate, 2 Channels Enabled l 15.7 18.0 mA 666ksps Sample Rate, 2 Channels Enabled, VREFBUF = 5V (Note 14) l 14.4 16.8 mA Acquisition Mode l 2.7 3.8 mA Power Down Mode (C-Grade and I-Grade) l 65 225 μA Power Down Mode (H-Grade) l 65 500 µA IOVDD Supply Current 666ksps Sample Rate, 2 Channels Enabled (RL = 100Ω) l 7.4 9.5 mA Acquisition Mode (RL = 100Ω) l 7 8.2 mA Power Down Mode l 1 20 μA PD Power Dissipation 666ksps Sample Rate, 2 Channels Enabled l 97 114 mW Acquisition Mode l 31 40 mW Power Down Mode (C-Grade and I-Grade) l 0.33 1.2 mW Power Down Mode (H-Grade) l 0.33 2.6 mW
ADC TIMING CHARACTERISTICS The
l
denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. (Note 8) SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
fSMPL Maximum Sampling Frequency 2 Channels Enabled l 666 ksps 1 Channel Enabled l 1000 ksps tCYC Time Between Conversions 2 Channels Enabled, fSMPL = 666ksps l 1500 ns 1 Channel Enabled, fSMPL = 1000ksps l 1000 ns tCONV Conversion Time N Channels Enabled, 1 ≤ N ≤ 2 l 450 • N –40 500 • N –40 550 • N –40 ns 234116f 6 For more information www.linear.com/LTC2341-16 Document Outline Features Applications Typical Application Description Absolute Maximum Ratings Order Information Pin Configuration Electrical Characteristics Converter Characteristics Dynamic Accuracy Internal Reference Characteristics Reference Buffer Characteristics Digital Inputs and Digital Outputs Power Requirements ADC Timing Characteristics Typical Performance Characteristics Pin Functions Configuration Tables Functional Block Diagram Timing Diagram Applications Information Board Layout Package Description Typical Application Related Parts
POWER REQUIREMENTS The
l
denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. (Note 8) SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS CMOS I/O Mode
VDD Supply Voltage l 4.75 5.00 5.25 V OVDD Supply Voltage l 1.71 5.25 V IVDD Supply Current 666ksps Sample Rate, 2 Channels Enabled l 13.7 16.0 mA 666ksps Sample Rate, 2 Channels Enabled, VREFBUF = 5V (Note 14) l 12.3 14.8 mA Acquisition Mode l 1.2 2.0 mA Power Down Mode (C-Grade and I-Grade) l 65 225 μA Power Down Mode (H-Grade) l 65 500 µA IOVDD Supply Current 666ksps Sample Rate, 2 Channels Enabled (CL = 25pF) l 2.2 3.4 mA Acquisition Mode l 1 20 μA Power Down Mode l 1 20 μA PD Power Dissipation 666ksps Sample Rate, 2 Channels Enabled l 74 89 mW Acquisition Mode l 6.0 10 mW Power Down Mode (C-Grade and I-Grade) l 0.33 1.2 mW Power Down Mode (H-Grade) l 0.33 2.6 mW
LVDS I/O Mode
VDD Supply Voltage l 4.75 5.00 5.25 V OVDD Supply Voltage l 2.375 5.25 V IVDD Supply Current 666ksps Sample Rate, 2 Channels Enabled l 15.7 18.0 mA 666ksps Sample Rate, 2 Channels Enabled, VREFBUF = 5V (Note 14) l 14.4 16.8 mA Acquisition Mode l 2.7 3.8 mA Power Down Mode (C-Grade and I-Grade) l 65 225 μA Power Down Mode (H-Grade) l 65 500 µA IOVDD Supply Current 666ksps Sample Rate, 2 Channels Enabled (RL = 100Ω) l 7.4 9.5 mA Acquisition Mode (RL = 100Ω) l 7 8.2 mA Power Down Mode l 1 20 μA PD Power Dissipation 666ksps Sample Rate, 2 Channels Enabled l 97 114 mW Acquisition Mode l 31 40 mW Power Down Mode (C-Grade and I-Grade) l 0.33 1.2 mW Power Down Mode (H-Grade) l 0.33 2.6 mW
ADC TIMING CHARACTERISTICS The
l
denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. (Note 8) SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
fSMPL Maximum Sampling Frequency 2 Channels Enabled l 666 ksps 1 Channel Enabled l 1000 ksps tCYC Time Between Conversions 2 Channels Enabled, fSMPL = 666ksps l 1500 ns 1 Channel Enabled, fSMPL = 1000ksps l 1000 ns tCONV Conversion Time N Channels Enabled, 1 ≤ N ≤ 2 l 450 • N –40 500 • N –40 550 • N –40 ns 234116f 6 For more information www.linear.com/LTC2341-16 Document Outline Features Applications Typical Application Description Absolute Maximum Ratings Order Information Pin Configuration Electrical Characteristics Converter Characteristics Dynamic Accuracy Internal Reference Characteristics Reference Buffer Characteristics Digital Inputs and Digital Outputs Power Requirements ADC Timing Characteristics Typical Performance Characteristics Pin Functions Configuration Tables Functional Block Diagram Timing Diagram Applications Information Board Layout Package Description Typical Application Related Parts