Datasheet LTC2348-18 (Analog Devices)
| 制造商 | Analog Devices |
| 描述 | Octal, 18-Bit, 200ksps Differential ±10.24V Input SoftSpan ADC with Wide Input Common Mode Range |
| 页数 / 页 | 40 / 1 — FeaTures. DescripTion. 200ksps per Channel Throughput. Eight Simultaneous … |
| 文件格式/大小 | PDF / 1.7 Mb |
| 文件语言 | 英语 |
FeaTures. DescripTion. 200ksps per Channel Throughput. Eight Simultaneous Sampling Channels. ±3LSB INL (Maximum, ±10.24V Range)
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LTC2348-18 Octal, 18-Bit, 200ksps Differential ±10.24V Input SoftSpan ADC with Wide Input Common Mode Range
FeaTures DescripTion
n
200ksps per Channel Throughput
The LTC®2348-18 is an 18-bit, low noise 8-channel si- n
Eight Simultaneous Sampling Channels
multaneous sampling successive approximation register n
±3LSB INL (Maximum, ±10.24V Range)
(SAR) ADC with differential, wide common mode range n
Guaranteed 18-Bit, No Missing Codes
inputs. Operating from a 5V low voltage supply, flexible n
Differential, Wide Common Mode Range Inputs
high voltage supplies, and using the internal reference n
Per-Channel SoftSpan Input Ranges:
and buffer, each channel of this SoftSpanTM ADC can be
±10.24V, 0V to 10.24V, ±5.12V, 0V to 5.12V
independently configured on a conversion-by-conversion
±12.5V, 0V to 12.5V, ±6.25V, 0V to 6.25V
basis to accept ±10.24V, 0V to 10.24V, ±5.12V, or 0V to n
96.7dB Single-Conversion SNR (Typical)
5.12V signals. Individual channels may also be disabled n to increase throughput on the remaining channels.
−109dB THD (Typical) at fIN = 2kHz
n
118dB CMRR (Typical) at fIN = 200Hz
The wide input common mode range and 118dB CMRR of n
Rail-to-Rail Input Overdrive Tolerance
the LTC2348-18 analog inputs allow the ADC to directly n Guaranteed Operation to 125°C digitize a variety of signals, simplifying signal chain de- n Integrated Reference and Buffer (4.096V) sign. This input signal flexibility, combined with ±3LSB n SPI CMOS (1.8V to 5V) and LVDS Serial I/O INL, no missing codes at 18 bits, and 96.7dB SNR, makes n Internal Conversion Clock, No Cycle Latency the LTC2348-18 an ideal choice for many high voltage n 140mW Power Dissipation (Typical) applications requiring wide dynamic range. n 48-Lead (7mm x 7mm) LQFP Package The LTC2348-18 supports pin-selectable SPI CMOS (1.8V to 5V) and LVDS serial interfaces. Between one and eight
applicaTions
lanes of data output may be employed in CMOS mode, allowing the user to optimize bus width and throughput. n Programmable Logic Controllers L, LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks and n Industrial Process Control SoftSpan is a trademark of Linear Technology Corporation. All other trademarks are the property of their respective owners. Protected by U.S. Patents, including 7705765, 7961132, 8319673. n Power Line Monitoring Other Patents pending. n Test and Measurement
Typical applicaTion
15V 5V 1.8V TO 5V 0.1µF 0.1µF 2.2µF 0.1µF
Integral Nonlinearity vs
CMOS OR LVDS
Output Code and Channel
I/O INTERFACE FULLY 2.0 VCC VDD VDDLBYP OVDD ARBITRARY DIFFERENTIAL LVDS/CMOS IN0+ ±10.24V RANGE S/H +10V +5V PD IN0– 1.5 TRUE BIPOLAR DRIVE (IN– = 0V) S/H LTC2348-18 ALL CHANNELS 0V 0V 1.0 S/H SDO0 • • • –10V –5V • • • 0.5 S/H 18-BIT MUX SDO7 0 TRUE BIPOLAR UNIPOLAR S/H SAR ADC SCKO +10V +10V SCKI S/H –0.5 SDI INL ERROR (LSB) 0V 0V S/H CS –1.0 –10V –10V BUSY SAMPLE IN7+ S/H CNV CLOCK IN7– –1.5 DIFFERENTIAL INPUTS IN+/IN– WITH VEE REFBUF REFIN GND WIDE INPUT COMMON MODE RANGE 234818 TA01a –2.0 –131072 –65536 0 65536 131072 EIGHT SIMULTANEOUS 47µF 0.1µF 0.1µF OUTPUT CODE SAMPLING CHANNELS –15V 234818 TA01b 234818fa For more information www.linear.com/LTC2348-18 1 Document Outline Features Description Applications Typical Application Absolute Maximum Ratings Pin Configuration Order Information Electrical Characteristics Converter Characteristics Dynamic Accuracy Internal Reference Characteristics Reference Buffer Characteristics Digital Inputs and Digital Outputs Power Requirements ADC Timing Characteristics Typical Performance Characteristics Pin Functions Configuration Tables Functional Block Diagram Timing Diagram Applications Information Board Layout Package Description Revision History Typical Application Related Parts
FeaTures DescripTion
n
200ksps per Channel Throughput
The LTC®2348-18 is an 18-bit, low noise 8-channel si- n
Eight Simultaneous Sampling Channels
multaneous sampling successive approximation register n
±3LSB INL (Maximum, ±10.24V Range)
(SAR) ADC with differential, wide common mode range n
Guaranteed 18-Bit, No Missing Codes
inputs. Operating from a 5V low voltage supply, flexible n
Differential, Wide Common Mode Range Inputs
high voltage supplies, and using the internal reference n
Per-Channel SoftSpan Input Ranges:
and buffer, each channel of this SoftSpanTM ADC can be
±10.24V, 0V to 10.24V, ±5.12V, 0V to 5.12V
independently configured on a conversion-by-conversion
±12.5V, 0V to 12.5V, ±6.25V, 0V to 6.25V
basis to accept ±10.24V, 0V to 10.24V, ±5.12V, or 0V to n
96.7dB Single-Conversion SNR (Typical)
5.12V signals. Individual channels may also be disabled n to increase throughput on the remaining channels.
−109dB THD (Typical) at fIN = 2kHz
n
118dB CMRR (Typical) at fIN = 200Hz
The wide input common mode range and 118dB CMRR of n
Rail-to-Rail Input Overdrive Tolerance
the LTC2348-18 analog inputs allow the ADC to directly n Guaranteed Operation to 125°C digitize a variety of signals, simplifying signal chain de- n Integrated Reference and Buffer (4.096V) sign. This input signal flexibility, combined with ±3LSB n SPI CMOS (1.8V to 5V) and LVDS Serial I/O INL, no missing codes at 18 bits, and 96.7dB SNR, makes n Internal Conversion Clock, No Cycle Latency the LTC2348-18 an ideal choice for many high voltage n 140mW Power Dissipation (Typical) applications requiring wide dynamic range. n 48-Lead (7mm x 7mm) LQFP Package The LTC2348-18 supports pin-selectable SPI CMOS (1.8V to 5V) and LVDS serial interfaces. Between one and eight
applicaTions
lanes of data output may be employed in CMOS mode, allowing the user to optimize bus width and throughput. n Programmable Logic Controllers L, LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks and n Industrial Process Control SoftSpan is a trademark of Linear Technology Corporation. All other trademarks are the property of their respective owners. Protected by U.S. Patents, including 7705765, 7961132, 8319673. n Power Line Monitoring Other Patents pending. n Test and Measurement
Typical applicaTion
15V 5V 1.8V TO 5V 0.1µF 0.1µF 2.2µF 0.1µF
Integral Nonlinearity vs
CMOS OR LVDS
Output Code and Channel
I/O INTERFACE FULLY 2.0 VCC VDD VDDLBYP OVDD ARBITRARY DIFFERENTIAL LVDS/CMOS IN0+ ±10.24V RANGE S/H +10V +5V PD IN0– 1.5 TRUE BIPOLAR DRIVE (IN– = 0V) S/H LTC2348-18 ALL CHANNELS 0V 0V 1.0 S/H SDO0 • • • –10V –5V • • • 0.5 S/H 18-BIT MUX SDO7 0 TRUE BIPOLAR UNIPOLAR S/H SAR ADC SCKO +10V +10V SCKI S/H –0.5 SDI INL ERROR (LSB) 0V 0V S/H CS –1.0 –10V –10V BUSY SAMPLE IN7+ S/H CNV CLOCK IN7– –1.5 DIFFERENTIAL INPUTS IN+/IN– WITH VEE REFBUF REFIN GND WIDE INPUT COMMON MODE RANGE 234818 TA01a –2.0 –131072 –65536 0 65536 131072 EIGHT SIMULTANEOUS 47µF 0.1µF 0.1µF OUTPUT CODE SAMPLING CHANNELS –15V 234818 TA01b 234818fa For more information www.linear.com/LTC2348-18 1 Document Outline Features Description Applications Typical Application Absolute Maximum Ratings Pin Configuration Order Information Electrical Characteristics Converter Characteristics Dynamic Accuracy Internal Reference Characteristics Reference Buffer Characteristics Digital Inputs and Digital Outputs Power Requirements ADC Timing Characteristics Typical Performance Characteristics Pin Functions Configuration Tables Functional Block Diagram Timing Diagram Applications Information Board Layout Package Description Revision History Typical Application Related Parts