Datasheet LTC2355-12, LTC2355-14 (Analog Devices) - 9

制造商Analog Devices
描述Serial 12-Bit, 3.5Msps Sampling ADCs with Shutdown
页数 / 页18 / 9 — TIMING DIAGRAM. LTC2355-12 Timing Diagram. LTC2355-14 Timing Diagram. Nap …
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TIMING DIAGRAM. LTC2355-12 Timing Diagram. LTC2355-14 Timing Diagram. Nap Mode and Sleep Mode Waveforms. SCK to SDO Delay

TIMING DIAGRAM LTC2355-12 Timing Diagram LTC2355-14 Timing Diagram Nap Mode and Sleep Mode Waveforms SCK to SDO Delay

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LTC2355-12/LTC2355-14
TIMING DIAGRAM LTC2355-12 Timing Diagram
t2 t7 t3 t1 16 17 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 1 SCK t4 t5 CONV t6 tACQ INTERNAL S/H STATUS SAMPLE HOLD SAMPLE HOLD t8 t10 t8 t9 SDO REPRESENTS THE ANALOG INPUT FROM THE PREVIOUS CONVERSION SDO Hi-Z Hi-Z D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0 X X 2355 TD01 14-BIT DATA WORD tCONV tTHROUGHPUT *BITS MARKED "X" AFTER D0 SHOULD BE IGNORED.
LTC2355-14 Timing Diagram
t2 t7 t3 t1 16 17 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 1 SCK t4 t5 CONV t6 tACQ INTERNAL S/H STATUS SAMPLE HOLD SAMPLE HOLD t8 t10 t8 t9 SDO REPRESENTS THE ANALOG INPUT FROM THE PREVIOUS CONVERSION SDO Hi-Z Hi-Z D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0 2355 TD01b 14-BIT DATA WORD tCONV tTHROUGHPUT
Nap Mode and Sleep Mode Waveforms
SLK t1 t1 CONV NAP SLEEP t12 VREF 2355 TD02 NOTE: NAP AND SLEEP ARE INTERNAL SIGNALS
SCK to SDO Delay
SCK SCK VIH VIH t8 t10 t9 VOH 90% SDO SDO VOL 10% 2355 TD03 2355fb For more information www.linear.com/LTC2355-12 9 Document Outline Features Description Applications Block Diagram Absolute Maximum Ratings Pin Configuration Order Information Converter Characteristics Analog Input Dynamic Accuracy Internal Reference Characteristics Digital Inputs and Digital Outputs Power Requirements Timing Characteristics Typical Performance Characteristics Pin Functions Block Diagram Timing Diagram Applications Information Package Description Revision History Typical Application Related Parts