LTC2365/LTC2366 block DiagraM 10µF 4.7µF + + VDD OVDD 1 5 AIN ANALOG 4 + THREE- INPUT RANGE STATE OV TO VREF S & H 12-BIT ADC SERIAL 6 SDO – OUTPUT PORT VREF 2 7 SCK + TIMING 4.7µF GND LOGIC 3 8 CS TS8 PACKAGE 23656 BD tiMing DiagraMs t8 SCK 1.6V Hi-Z SDO 23656 TD01 Figure 1. SDO Into Hi-Z State After SCK Falling Edge t7 SCK 1.6V VIH SDO VIL 23656 TD02 Figure 2. SDO Data Valid Hold Time After SCK Falling Edge t4 SCK 1.6V VOH SDO VOL 23656 TD03 Figure 3. SDO Data Valid Access Time After SCK Falling Edge 23656fb 10 For more information www.linear.com/LTC2365 Document Outline Features Applications Description Typical Application Absolute Maximum Ratings Pin Configuration Order Information Converter Characteristics Analog Inputs Dynamic Accuracy Digital Inputs and Digital Outputs Power Requirement Timing Characteristics Typical Performance Characteristics Pin Functions Block Diagram Timing Diagrams Applications Information Package Description Revision History Related Parts