Datasheet LTC2424, LTC2428 (Analog Devices) - 9
| 制造商 | Analog Devices |
| 描述 | 4-/8-Channel 20-Bit µPower No Latency ∆ΣTM ADCs |
| 页数 / 页 | 36 / 9 — TYPICAL PERFOR A CE CHARACTERISTICS. INL vs Output Rate. Resolution vs … |
| 文件格式/大小 | PDF / 431 Kb |
| 文件语言 | 英语 |
TYPICAL PERFOR A CE CHARACTERISTICS. INL vs Output Rate. Resolution vs Output Rate. PIN FUNCTIONS
该数据表的模型线
文件文字版本
LTC2424/LTC2428
W U TYPICAL PERFOR A CE CHARACTERISTICS INL vs Output Rate INL vs Output Rate Resolution vs Output Rate
20 20 24 VCC = 5V VCC = 3V V T CC = 5V A = 25°C VREF = 5V VREF = 2.5V V T REF = 5V A = 90°C FO = EXTERNAL FO = EXTERNAL f T 18 18 O = EXTERNAL A = –45°C 22 16 T 16 A = –45°C T T A = –45°C A = 25°C 20 14 14 T TA = 25°C RESOLUTION (BITS) T TUE RESOLUTION (BITS) A = 90°C TUE RESOLUTION (BITS) A = 90°C 18 12 12 10 10 16 0 10 20 30 40 50 60 70 80 90 100 0 10 20 30 40 50 60 70 80 90 100 0 7.5 25 50 75 100 OUTPUT RATE (Hz) OUTPUT RATE (Hz) OUTPUT RATE (Hz) 24248 G27 24248 G28 24248 G29
U U U PIN FUNCTIONS GND (Pins 1, 6, 16, 18, 22, 27, 28):
Ground. Should be
CH1 (Pin 10):
Analog Multiplexer Input. connected directly to a ground plane through a minimum
CH2 (Pin 11):
Analog Multiplexer Input. length trace or it should be the single-point-ground in a single-point grounding system.
CH3 (Pin 12):
Analog Multiplexer Input.
V CH4 (Pin 13):
Analog Multiplexer Input. No connect on the
CC (Pins 2, 8):
Positive Supply Voltage. 2.7V ≤ VCC ≤ 5.5V. Bypass to GND with a 10µF tantalum capacitor in LTC2424. parallel with 0.1µF ceramic capacitor as close to the part
CH5 (Pin 14):
Analog Multiplexer Input. No connect on the as possible. LTC2424.
FSSET (Pin 3):
Full-Scale Set Input. This pin defines the
CH6 (Pin 15):
Analog Multiplexer Input. No connect on the full-scale input value. When VIN = FSSET, the ADC outputs LTC2424. full scale (FFFFFH). The total reference voltage (VREF) is FS
CH7 (Pin 17):
Analog Multiplexer Input. No connect on the SET – ZSSET. LTC2424.
ADCIN (Pin 4):
Analog Input. The input voltage range is – 0.125 • V
CLK (Pin 19):
Shift Clock for Data In. This clock synchro- REF to 1.125 • VREF. For VREF > 2.5V the input voltage range may be limited by the pin absolute maxi- nizes the serial data transfer into the MUX. For normal mum rating of – 0.3V to V operation, drive this pin in parallel with SCK. CC + 0.3V.
ZS CSMUX (Pin 20):
MUX Chip Select Input. A logic high on
SET (Pin 5):
Zero-Scale Set Input. This pin defines the zero-scale input value. When V this input allows the MUX to receive a channel address. A IN = ZSSET, the ADC outputs zero scale (00000 logic low enables the selected MUX channel and connects H). For pin compatibility with the LTC2404/ LTC2408 this pin must be grounded. it to the MUXOUT pin for A/D conversion. For normal operation, drive this pin in parallel with CSADC.
MUXOUT (Pin 7):
MUX Output. This pin is the output of the multiplexer. Tie to ADCIN for normal operation.
DIN (Pin 21):
Digital Data Input. The multiplexer address is shifted into this input on the last four rising CLK edges
CH0 (Pin 9):
Analog Multiplexer Input. before CSMUX goes low. 9
W U TYPICAL PERFOR A CE CHARACTERISTICS INL vs Output Rate INL vs Output Rate Resolution vs Output Rate
20 20 24 VCC = 5V VCC = 3V V T CC = 5V A = 25°C VREF = 5V VREF = 2.5V V T REF = 5V A = 90°C FO = EXTERNAL FO = EXTERNAL f T 18 18 O = EXTERNAL A = –45°C 22 16 T 16 A = –45°C T T A = –45°C A = 25°C 20 14 14 T TA = 25°C RESOLUTION (BITS) T TUE RESOLUTION (BITS) A = 90°C TUE RESOLUTION (BITS) A = 90°C 18 12 12 10 10 16 0 10 20 30 40 50 60 70 80 90 100 0 10 20 30 40 50 60 70 80 90 100 0 7.5 25 50 75 100 OUTPUT RATE (Hz) OUTPUT RATE (Hz) OUTPUT RATE (Hz) 24248 G27 24248 G28 24248 G29
U U U PIN FUNCTIONS GND (Pins 1, 6, 16, 18, 22, 27, 28):
Ground. Should be
CH1 (Pin 10):
Analog Multiplexer Input. connected directly to a ground plane through a minimum
CH2 (Pin 11):
Analog Multiplexer Input. length trace or it should be the single-point-ground in a single-point grounding system.
CH3 (Pin 12):
Analog Multiplexer Input.
V CH4 (Pin 13):
Analog Multiplexer Input. No connect on the
CC (Pins 2, 8):
Positive Supply Voltage. 2.7V ≤ VCC ≤ 5.5V. Bypass to GND with a 10µF tantalum capacitor in LTC2424. parallel with 0.1µF ceramic capacitor as close to the part
CH5 (Pin 14):
Analog Multiplexer Input. No connect on the as possible. LTC2424.
FSSET (Pin 3):
Full-Scale Set Input. This pin defines the
CH6 (Pin 15):
Analog Multiplexer Input. No connect on the full-scale input value. When VIN = FSSET, the ADC outputs LTC2424. full scale (FFFFFH). The total reference voltage (VREF) is FS
CH7 (Pin 17):
Analog Multiplexer Input. No connect on the SET – ZSSET. LTC2424.
ADCIN (Pin 4):
Analog Input. The input voltage range is – 0.125 • V
CLK (Pin 19):
Shift Clock for Data In. This clock synchro- REF to 1.125 • VREF. For VREF > 2.5V the input voltage range may be limited by the pin absolute maxi- nizes the serial data transfer into the MUX. For normal mum rating of – 0.3V to V operation, drive this pin in parallel with SCK. CC + 0.3V.
ZS CSMUX (Pin 20):
MUX Chip Select Input. A logic high on
SET (Pin 5):
Zero-Scale Set Input. This pin defines the zero-scale input value. When V this input allows the MUX to receive a channel address. A IN = ZSSET, the ADC outputs zero scale (00000 logic low enables the selected MUX channel and connects H). For pin compatibility with the LTC2404/ LTC2408 this pin must be grounded. it to the MUXOUT pin for A/D conversion. For normal operation, drive this pin in parallel with CSADC.
MUXOUT (Pin 7):
MUX Output. This pin is the output of the multiplexer. Tie to ADCIN for normal operation.
DIN (Pin 21):
Digital Data Input. The multiplexer address is shifted into this input on the last four rising CLK edges
CH0 (Pin 9):
Analog Multiplexer Input. before CSMUX goes low. 9