Datasheet LTC2430, LTC2431 (Analog Devices) - 9

LTC2430/LTC2431
U U U PI FU CTIO S (LTC2430) GND (Pins 1, 7, 8, 9, 10, 15, 16):
Ground. Multiple ground
SDO (Pin 12):
Three-State Digital Output. During the Data pins internally connected for optimum ground current flow Output period, this pin is used as serial data output. When and VCC decoupling. Connect each one of these pins to a the chip select CS is HIGH (CS = VCC) the SDO pin is in a ground plane through a low impedance connection. All seven high impedance state. During the Conversion and Sleep pins must be connected to ground for proper operation. periods, this pin is used as the conversion status output. The conversion status can be observed by pulling CS LOW.
VCC (Pin 2):
Positive Supply Voltage. Bypass to GND with a 10µF tantalum capacitor in parallel with 0.1µF ceramic
SCK (Pin 13):
Bidirectional Digital Clock Pin. In Internal capacitor as close to the part as possible. Serial Clock Operation mode, SCK is used as digital output for the internal serial interface clock during the Data
REF+ (Pin 3), REF– (Pin 4):
Differential Reference Input. Output period. In External Serial Clock Operation mode, The voltage on these pins can have any value between GND SCK is used as digital input for the external serial interface and VCC as long as the reference positive input, REF+, is clock during the Data Output period. A weak internal pull- maintained more positive than the reference negative up is automatically activated in Internal Serial Clock Op- input, REF –, by at least 0.1V. eration mode. The Serial Clock Operation mode is deter-
IN+ (Pin 5), IN– (Pin 6):
Differential Analog Input. The mined by the logic level applied to the SCK pin at power up voltage on these pins can have any value between or during the most recent falling edge of CS. GND – 0.3V and VCC + 0.3V. Within these limits the
F
converter bipolar input range (V
O (Pin 14):
Frequency Control Pin. Digital input that IN = IN+ – IN–) extends controls the ADC’s notch frequencies and conversion from – 0.5 • (VREF) to 0.5 • (VREF). Outside this input range time. When the F the converter produces unique overrange and underrange O pin is connected to VCC (FO = VCC), the converter uses its internal oscillator and the digital filter output codes. first null is located at 50Hz. When the FO pin is connected
CS (Pin 11):
Active LOW Digital Input. A LOW on this pin to GND (FO = OV), the converter uses its internal oscillator enables the SDO digital output and wakes up the ADC. and the digital filter first null is located at 60Hz. When FO Following each conversion the ADC automatically enters is driven by an external clock signal with a frequency fEOSC, the Sleep mode and remains in this low power state as the converter uses this signal as its system clock and the long as CS is HIGH. A LOW-to-HIGH transition on CS digital filter first null is located at a frequency fEOSC/2560. during the Data Output transfer aborts the data transfer and starts a new conversion.
(LTC2431) VCC (Pin 1):
Positive Supply Voltage. Bypass to GND from – 0.5 • (VREF) to 0.5 • (VREF). Outside this input (Pin␣ 6) with a 10µF tantalum capacitor in parallel with range, the converter produces unique overrange and 0.1µF ceramic capacitor as close to the part as possible. underrange output codes.
REF+ (Pin 2), REF– (Pin 3):
Differential Reference Input.
GND (Pin 6):
Ground. Connect this pin to a ground plane The voltage on these pins can have any value between GND through a low impedance connection. and VCC as long as the reference positive input, REF+, is
CS (Pin 7):
Active LOW Digital Input. A LOW on this pin maintained more positive than the reference negative enables the SDO digital output and wakes up the ADC. input, REF –, by at least 0.1V. Following each conversion, the ADC automatically enters
IN+ (Pin 4), IN– (Pin 5):
Differential Analog Input. The the Sleep mode and remains in this low power state as voltage on these pins can have any value between long as CS is HIGH. A LOW-to-HIGH transition on CS GND – 0.3V and VCC + 0.3V. Within these limits, the during the Data Output transfer aborts the data transfer converter bipolar input range (VIN = IN+ – IN–) extends and starts a new conversion. 24301f 9