Datasheet LTC2435, LTC2435-1 (Analog Devices) - 10

LTC2435/LTC2435-1
pin FuncTions GND (Pins 1, 7, 8, 9, 10, 15, 16):
Ground. Multiple ground
SDO (Pin 12):
Three-State Digital Output. During the Data pins internally connected for optimum ground current Output period, this pin is used as serial data output. When flow and VCC decoupling. Connect each one of these pins the chip select CS is HIGH (CS = VCC) the SDO pin is in a to a ground plane through a low impedance connection. high impedance state. During the Conversion and Sleep All seven pins must be connected to ground for proper periods, this pin is used as the conversion status output. operation. The conversion status can be observed by pulling CS LOW.
VCC (Pin 2):
Positive Supply Voltage. Bypass to GND
SCK (Pin 13):
Bidirectional Digital Clock Pin. In Internal (Pin 1) with a 10µF tantalum capacitor in parallel with Serial Clock Operation mode, SCK is used as digital output 0.1µF ceramic capacitor as close to the part as possible. for the internal serial interface clock during the Data Output
REF+ (Pin 3), REF– (Pin 4):
Differential Reference Input. period. In External Serial Clock Operation mode, SCK is The voltage on these pins can have any value between used as digital input for the external serial interface clock GND and V during the Data Output period. A weak internal pull-up is CC as long as the reference positive input, REF+, is maintained more positive than the reference negative automatically activated in Internal Serial Clock Operation input, REF –, by at least 0.1V. mode. The Serial Clock Operation mode is determined by the logic level applied to the SCK pin at power up or during
IN+ (Pin 5), IN– (Pin 6):
Differential Analog Input. The volt- the most recent falling edge of CS. age on these pins can have any value between GND – 0.3V and V
FO (Pin 14):
Frequency Control Pin. Digital input that CC + 0.3V. Within these limits the converter bipolar input range (V controls the ADC’s notch frequencies and conversion time. IN = IN+ – IN–) extends from – 0.5•(VREF) to 0.5•(V When the FO pin is connected to VCC (LTC2435 only), the REF). Outside this input range the converter produces unique overrange and underrange output codes. converter uses its internal oscillator and the digital filter first null is located at 50Hz. When the FO pin is connected
CS (Pin 11):
Active LOW Digital Input. A LOW on this pin to GND (FO = OV), the converter uses its internal oscillator enables the SDO digital output and wakes up the ADC. and the digital filter first null is located at 60Hz (LTC2435) Following each conversion, the ADC automatically enters or simultaneous 50Hz/60Hz (LTC2435-1). When FO is the Sleep mode and remains in this low power state as driven by an external clock signal with a frequency fEOSC, long as CS is HIGH. A LOW-to-HIGH transition on CS the converter uses this signal as its system clock and the during the Data Output transfer aborts the data transfer digital filter first null is located at a frequency fEOSC/2560. and starts a new conversion. 24351fc 10 For more information www.linear.com/LTC2435 Document Outline Features Description Applications Typical Applications Absolute Maximum Ratings Pin Configuration Order Information Electrical Characteristics Converter Characteristics Analog Input And Reference Digital Inputs And Digital Outputs Power Requirements Timing Characteristics Typical Performance Characteristics Pin Functions Functional Block Diagram Test Circuits Applications Information Package Description Revision History Typical Application Related Parts