Datasheet LTC2439-1 (Analog Devices) - 10
| 制造商 | Analog Devices |
| 描述 | 8-/16-Channel 16-Bit No Latency ∆Σ™ ADC |
| 页数 / 页 | 30 / 10 — APPLICATIONS INFORMATION. Table 1. Channel Selection. MUX ADDRESS. … |
| 文件格式/大小 | PDF / 583 Kb |
| 文件语言 | 英语 |
APPLICATIONS INFORMATION. Table 1. Channel Selection. MUX ADDRESS. CHANNEL SELECTION. ODD/. SGL SIGN A2. 15 COM
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LTC2439-1
APPLICATIONS INFORMATION
tain the parasitic capacitance of the connection between will introduce a temperature dependent offset error due these series resistors and the corresponding pins as low to the input leakage current. A 10nA input leakage current as possible; therefore, the resistors should be located as will develop a 1LBS offset error on an 8k resistor if VREF = close as practical to the pins. In addition, series resistors 5V. This error has a very strong temperature dependency.
Table 1. Channel Selection MUX ADDRESS CHANNEL SELECTION ODD/ SGL SIGN A2 A1 A0 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 COM
* 0 0 0 0 0 IN+ IN– 0 0 0 0 1 IN+ IN– 0 0 0 1 0 IN+ IN– 0 0 0 1 1 IN+ IN– 0 0 1 0 0 IN+ IN– 0 0 1 0 1 IN+ IN– 0 0 1 1 0 IN+ IN– 0 0 1 1 1 IN+ IN– 0 1 0 0 0 IN– IN+ 0 1 0 0 1 IN– IN+ 0 1 0 1 0 IN– IN+ 0 1 0 1 1 IN– IN+ 0 1 1 0 0 IN– IN+ 0 1 1 0 1 IN– IN+ 0 1 1 1 0 IN– IN+ 0 1 1 1 1 IN– IN+ 1 0 0 0 0 IN+ IN– 1 0 0 0 1 IN+ IN– 1 0 0 1 0 IN+ IN– 1 0 0 1 1 IN+ IN– 1 0 1 0 0 IN+ IN– 1 0 1 0 1 IN+ IN– 1 0 1 1 0 IN+ IN– 1 0 1 1 1 IN+ IN– 1 1 0 0 0 IN+ IN– 1 1 0 0 1 IN+ IN– 1 1 0 1 0 IN+ IN– 1 1 0 1 1 IN+ IN– 1 1 1 0 0 IN+ IN– 1 1 1 0 1 IN+ IN– 1 1 1 1 0 IN+ IN– 1 1 1 1 1 IN+ IN– *Default at power up 24391fb 10 For more information www.linear.com/LTC2439-1 Document Outline Features Applications Typical Application Absolute Maximum Ratings Order Information Electrical Characteristics Converter Characteristics Analog Input and Reference Digital Inputs and Digital Outputs POWER REQUIREMENTS Timing Characteristics Pin Functions FUNCTIONAL Block Diagram Test CircuitS Applications Information Package Description Revision History Typical Application Related Parts
APPLICATIONS INFORMATION
tain the parasitic capacitance of the connection between will introduce a temperature dependent offset error due these series resistors and the corresponding pins as low to the input leakage current. A 10nA input leakage current as possible; therefore, the resistors should be located as will develop a 1LBS offset error on an 8k resistor if VREF = close as practical to the pins. In addition, series resistors 5V. This error has a very strong temperature dependency.
Table 1. Channel Selection MUX ADDRESS CHANNEL SELECTION ODD/ SGL SIGN A2 A1 A0 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 COM
* 0 0 0 0 0 IN+ IN– 0 0 0 0 1 IN+ IN– 0 0 0 1 0 IN+ IN– 0 0 0 1 1 IN+ IN– 0 0 1 0 0 IN+ IN– 0 0 1 0 1 IN+ IN– 0 0 1 1 0 IN+ IN– 0 0 1 1 1 IN+ IN– 0 1 0 0 0 IN– IN+ 0 1 0 0 1 IN– IN+ 0 1 0 1 0 IN– IN+ 0 1 0 1 1 IN– IN+ 0 1 1 0 0 IN– IN+ 0 1 1 0 1 IN– IN+ 0 1 1 1 0 IN– IN+ 0 1 1 1 1 IN– IN+ 1 0 0 0 0 IN+ IN– 1 0 0 0 1 IN+ IN– 1 0 0 1 0 IN+ IN– 1 0 0 1 1 IN+ IN– 1 0 1 0 0 IN+ IN– 1 0 1 0 1 IN+ IN– 1 0 1 1 0 IN+ IN– 1 0 1 1 1 IN+ IN– 1 1 0 0 0 IN+ IN– 1 1 0 0 1 IN+ IN– 1 1 0 1 0 IN+ IN– 1 1 0 1 1 IN+ IN– 1 1 1 0 0 IN+ IN– 1 1 1 0 1 IN+ IN– 1 1 1 1 0 IN+ IN– 1 1 1 1 1 IN+ IN– *Default at power up 24391fb 10 For more information www.linear.com/LTC2439-1 Document Outline Features Applications Typical Application Absolute Maximum Ratings Order Information Electrical Characteristics Converter Characteristics Analog Input and Reference Digital Inputs and Digital Outputs POWER REQUIREMENTS Timing Characteristics Pin Functions FUNCTIONAL Block Diagram Test CircuitS Applications Information Package Description Revision History Typical Application Related Parts