Datasheet LTC2460, LTC2462 (Analog Devices) - 4
| 制造商 | Analog Devices |
| 描述 | Ultra-Tiny, 16-Bit ΔΣ ADCs with 10ppm/°C Max Precision Reference |
| 页数 / 页 | 22 / 4 — DigiTal inpuTs anD DigiTal ouTpuTs The. denotes the specifications which … |
| 文件格式/大小 | PDF / 317 Kb |
| 文件语言 | 英语 |
DigiTal inpuTs anD DigiTal ouTpuTs The. denotes the specifications which apply over the full
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LTC2460/LTC2462
DigiTal inpuTs anD DigiTal ouTpuTs The
l
denotes the specifications which apply over the full operating temperature range,otherwise specifications are at TA = 25°C. (Note 2) SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
VIH High Level Input Voltage l VCC – 0.3 V VIL Low Level Input Voltage l 0.3 V IIN Digital Input Current l –10 10 µA CIN Digital Input Capacitance 10 pF VOH High Level Output Voltage IO = –800µA l VCC – 0.5 V VOL Low Level Output Voltage IO = 1.6mA l 0.4 V IOZ Hi-Z Output Leakage Current l –10 10 µA
TiMing characTerisTics The
l
denotes the specifications which apply over the full operating temperature range,otherwise specifications are at TA = 25°C. SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
tCONV Conversion Time l 13 16.6 23 ms fSCK SCK Frequency Range l 2 MHz tlSCK SCK Low Period l 250 ns thSCK SCK High Period l 250 ns t1 CS Falling Edge to SDO Low Z (Notes 7, 8) l 0 100 ns t2 CS Rising Edge to SDO High Z (Notes 7, 8) l 0 100 ns t3 CS Falling Edge to SCK Falling Edge l 100 ns tKQ SCK Falling Edge to SDO Valid (Note 7) l 0 100 ns t4 SDI Setup Before SCK↑ (Note 3) l 100 ns t5 SDI Hold After SCK↑ (Note 3) l 100 ns
Note 1:
Stresses beyond those listed under Absolute Maximum Ratings
Note 5:
CS = VCC. A positive current is flowing into the DUT pin. may cause permanent damage to the device. Exposure to any Absolute
Note 6:
SCK = VCC or GND. SDO is high impedance. Maximum Rating condition for extended periods may affect device
Note 7:
See Figure 4. reliability and lifetime.
Note 8:
See Figure 5.
Note 2.
All voltage values are with respect to GND. VCC = 2.7V to 5.5V unless otherwise specified.
Note 9:
Input sampling current is the average input current drawn from the input sampling network while the LTC2460/LTC2462 is actively sampling VREFCM = VREF/2, FS = VREF the input. V + – + – IN = VIN – VIN , –VREF ≤ VIN ≤ VREF; VINCM = (VIN + VIN )/2.
Note 10:
A positive current is flowing into the DUT pin.
Note 3.
Guaranteed by design, not subject to test.
Note 11:
Temperature coefficient is calculated by dividing the maximum
Note 4.
Integral nonlinearity is defined as the deviation of a code from a change in output voltage by the specified temperature range. straight line passing through the actual endpoints of the transfer curve. Guaranteed by design and test correlation. 24602fa 4 Document Outline Features Applications Description Typical Application Absolute Maximum Ratings Pin Configuration Electrical Characteristics Analog Inputs Power Requirements Digital Inputs and Digital Outputs Timing Characteristics Typical Performance Characteristics Pin Functions Applications Information Package Description Revision History Typical Application Related Parts
DigiTal inpuTs anD DigiTal ouTpuTs The
l
denotes the specifications which apply over the full operating temperature range,otherwise specifications are at TA = 25°C. (Note 2) SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
VIH High Level Input Voltage l VCC – 0.3 V VIL Low Level Input Voltage l 0.3 V IIN Digital Input Current l –10 10 µA CIN Digital Input Capacitance 10 pF VOH High Level Output Voltage IO = –800µA l VCC – 0.5 V VOL Low Level Output Voltage IO = 1.6mA l 0.4 V IOZ Hi-Z Output Leakage Current l –10 10 µA
TiMing characTerisTics The
l
denotes the specifications which apply over the full operating temperature range,otherwise specifications are at TA = 25°C. SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
tCONV Conversion Time l 13 16.6 23 ms fSCK SCK Frequency Range l 2 MHz tlSCK SCK Low Period l 250 ns thSCK SCK High Period l 250 ns t1 CS Falling Edge to SDO Low Z (Notes 7, 8) l 0 100 ns t2 CS Rising Edge to SDO High Z (Notes 7, 8) l 0 100 ns t3 CS Falling Edge to SCK Falling Edge l 100 ns tKQ SCK Falling Edge to SDO Valid (Note 7) l 0 100 ns t4 SDI Setup Before SCK↑ (Note 3) l 100 ns t5 SDI Hold After SCK↑ (Note 3) l 100 ns
Note 1:
Stresses beyond those listed under Absolute Maximum Ratings
Note 5:
CS = VCC. A positive current is flowing into the DUT pin. may cause permanent damage to the device. Exposure to any Absolute
Note 6:
SCK = VCC or GND. SDO is high impedance. Maximum Rating condition for extended periods may affect device
Note 7:
See Figure 4. reliability and lifetime.
Note 8:
See Figure 5.
Note 2.
All voltage values are with respect to GND. VCC = 2.7V to 5.5V unless otherwise specified.
Note 9:
Input sampling current is the average input current drawn from the input sampling network while the LTC2460/LTC2462 is actively sampling VREFCM = VREF/2, FS = VREF the input. V + – + – IN = VIN – VIN , –VREF ≤ VIN ≤ VREF; VINCM = (VIN + VIN )/2.
Note 10:
A positive current is flowing into the DUT pin.
Note 3.
Guaranteed by design, not subject to test.
Note 11:
Temperature coefficient is calculated by dividing the maximum
Note 4.
Integral nonlinearity is defined as the deviation of a code from a change in output voltage by the specified temperature range. straight line passing through the actual endpoints of the transfer curve. Guaranteed by design and test correlation. 24602fa 4 Document Outline Features Applications Description Typical Application Absolute Maximum Ratings Pin Configuration Electrical Characteristics Analog Inputs Power Requirements Digital Inputs and Digital Outputs Timing Characteristics Typical Performance Characteristics Pin Functions Applications Information Package Description Revision History Typical Application Related Parts