Datasheet LTC2485 (Analog Devices) - 4
| 制造商 | Analog Devices |
| 描述 | 24-Bit ΔΣ ADC with Easy Drive Input Current Cancellation and I2C Interface |
| 页数 / 页 | 40 / 4 — a nalog inpuT anD reFerence The. denotes the specifications which apply … |
| 文件格式/大小 | PDF / 646 Kb |
| 文件语言 | 英语 |
a nalog inpuT anD reFerence The. denotes the specifications which apply over the full operating
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LTC2485
a nalog inpuT anD reFerence The
l
denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. (Note 3) SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
CS (IN+) IN+ Sampling Capacitance 11 pF CS (IN–) IN– Sampling Capacitance 11 pF CS (VREF) VREF Sampling Capacitance 11 pF IDC_LEAK (IN+) IN+ DC Leakage Current Sleep Mode, IN+ = GND ● –10 1 10 nA IDC_LEAK (IN–) IN– DC Leakage Current Sleep Mode, IN– = GND ● –10 1 10 nA IDC_LEAK (VREF) REF+, REF– DC Leakage Current Sleep Mode, VREF = VCC ● –100 1 100 nA
i2 c DigiTal inpuTs anD DigiTal ouTpuTs The
l
denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. (Note 3) SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
VIH High Level Input Voltage ● 0.7VCC V VIL Low Level Input Voltage ● 0.3VCC V VIL(CA1) Low Level Input Voltage for Address Pin ● 0.05VCC V VIH(CA0/f0,CA1) High Level Input Voltage for Address Pins ● 0.95VCC V RINH Resistance from CA0/f0, CA1 to VCC to Set ● 10 kΩ Chip Address Bit to 1 RINL Resistance from CA1 to GND to Set Chip ● 10 kΩ Address Bit to 0 RINF Resistance from CA0/f0, CA1 to VCC or ● 2 MΩ GND to Set Chip Address Bit to Float II Digital Input Current ● –10 10 µA VHYS Hysteresis of Schmitt Trig ger Inputs (Note 5) 0.05VCC V VOL Low Level Output Voltage SDA I = 3mA ● 0.4 V tOF Output Fall Time from VIHMIN to VILMAX Bus Load CB 10pF to 400pF (Note 14) ● 20+0.1CB 250 ns tSP Input Spike Suppression ● 50 ns IIN Input Leakage 0.1VCC ≤ VIN ≤ VCC ● 1 µA CI Capacitance for Each I/O Pin ● 10 pF CB Capacitance Load for Each Bus Line ● 400 pF CCAX External Capacitive Load On-Chip Address ● 10 pF Pins (CA0/f0,CA1) for Valid Float VIH(EXT,OSC) High Level CA0/f0 External Oscillator 2.7V ≤ VCC < 5.5V ● VCC – 0.5V V VIL(EXT,OSC) Low Level CA0/f0 External Oscillator 2.7V ≤ VCC < 5.5V ● 0.5 V
p ower requireMenTs The
l
denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. (Note 3) SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
VCC Supply Voltage ● 2.7 5.5 V ICC Supply Current Conversion Mode (Note 11) ● 160 250 µA Sleep Mode (Note 11) ● 1 2 µA 2485fd 4 For more information www.linear.com/LTC2485 Document Outline Features Applications Description Typical Application Absolute Maximum Ratings Pin Configuration Order Information Electrical Characteristics (Normal Speed) Electrical Characteristics (2x Speed) Converter Characteristics Analog Input and Reference I2C Digital Inputs and Digital Outputs Power Requirements Timing Characteristics I2C Timing Characteristics Typical Performance Characteristics Pin Functions Functional Block Diagram Applications Information Package Description Revision History Typical Application Related Parts
a nalog inpuT anD reFerence The
l
denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. (Note 3) SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
CS (IN+) IN+ Sampling Capacitance 11 pF CS (IN–) IN– Sampling Capacitance 11 pF CS (VREF) VREF Sampling Capacitance 11 pF IDC_LEAK (IN+) IN+ DC Leakage Current Sleep Mode, IN+ = GND ● –10 1 10 nA IDC_LEAK (IN–) IN– DC Leakage Current Sleep Mode, IN– = GND ● –10 1 10 nA IDC_LEAK (VREF) REF+, REF– DC Leakage Current Sleep Mode, VREF = VCC ● –100 1 100 nA
i2 c DigiTal inpuTs anD DigiTal ouTpuTs The
l
denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. (Note 3) SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
VIH High Level Input Voltage ● 0.7VCC V VIL Low Level Input Voltage ● 0.3VCC V VIL(CA1) Low Level Input Voltage for Address Pin ● 0.05VCC V VIH(CA0/f0,CA1) High Level Input Voltage for Address Pins ● 0.95VCC V RINH Resistance from CA0/f0, CA1 to VCC to Set ● 10 kΩ Chip Address Bit to 1 RINL Resistance from CA1 to GND to Set Chip ● 10 kΩ Address Bit to 0 RINF Resistance from CA0/f0, CA1 to VCC or ● 2 MΩ GND to Set Chip Address Bit to Float II Digital Input Current ● –10 10 µA VHYS Hysteresis of Schmitt Trig ger Inputs (Note 5) 0.05VCC V VOL Low Level Output Voltage SDA I = 3mA ● 0.4 V tOF Output Fall Time from VIHMIN to VILMAX Bus Load CB 10pF to 400pF (Note 14) ● 20+0.1CB 250 ns tSP Input Spike Suppression ● 50 ns IIN Input Leakage 0.1VCC ≤ VIN ≤ VCC ● 1 µA CI Capacitance for Each I/O Pin ● 10 pF CB Capacitance Load for Each Bus Line ● 400 pF CCAX External Capacitive Load On-Chip Address ● 10 pF Pins (CA0/f0,CA1) for Valid Float VIH(EXT,OSC) High Level CA0/f0 External Oscillator 2.7V ≤ VCC < 5.5V ● VCC – 0.5V V VIL(EXT,OSC) Low Level CA0/f0 External Oscillator 2.7V ≤ VCC < 5.5V ● 0.5 V
p ower requireMenTs The
l
denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. (Note 3) SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
VCC Supply Voltage ● 2.7 5.5 V ICC Supply Current Conversion Mode (Note 11) ● 160 250 µA Sleep Mode (Note 11) ● 1 2 µA 2485fd 4 For more information www.linear.com/LTC2485 Document Outline Features Applications Description Typical Application Absolute Maximum Ratings Pin Configuration Order Information Electrical Characteristics (Normal Speed) Electrical Characteristics (2x Speed) Converter Characteristics Analog Input and Reference I2C Digital Inputs and Digital Outputs Power Requirements Timing Characteristics I2C Timing Characteristics Typical Performance Characteristics Pin Functions Functional Block Diagram Applications Information Package Description Revision History Typical Application Related Parts