Datasheet LTM9002 (Analog Devices)

制造商Analog Devices
描述14-Bit, 125Msps Dual-Channel IF/Baseband Receiver Subsystem
页数 / 页28 / 1 — FEATURES. DESCRIPTION. Integrated Dual 14-Bit, High-Speed ADC, Passive. …
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FEATURES. DESCRIPTION. Integrated Dual 14-Bit, High-Speed ADC, Passive. Filters and Fixed Gain Differential Amplifi ers

Datasheet LTM9002 Analog Devices

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LTM9002 14-Bit Dual-Channel IF/ Baseband Receiver Subsystem
FEATURES DESCRIPTION
n
Integrated Dual 14-Bit, High-Speed ADC, Passive
The LTM®9002 is a 14-bit dual-channel IF receiver sub-
Filters and Fixed Gain Differential Amplifi ers
system. Utilizing an integrated system in a package (SiP) n
Up to 300MHz IF Range
technology, it includes a dual high-speed 14-bit A/D con-
Lowpass and Bandpass Filter Versions
verter, matching network, anti-aliasing fi lter and two low n
Integrated Low Noise, Low Distortion Amplifi ers
noise, differential amplifi ers. It is designed for digitizing
Fixed Gain: 8dB, 14dB, 20dB or 26dB
wide dynamic range signals with an intermediate frequency
50Ω, 200Ω or 400Ω Input Impedance
(IF) up to 300MHz. The amplifi ers allow either AC- or DC- n
Integrated Bypass Capacitance, No External
coupled input drive. Lowpass or bandpass fi lter networks
Components Required
can be implemented with various bandwidths. Contact n 66dB SNR Up to 140MHz Input (LTM9002-AA) Linear Technology regarding customization. n 76dB SFDR Up to 140MHz Input (LTM9002-AA) The LTM9002 is perfect for demanding communications n Auxiliary 12-Bit DACs for Gain Adjustment applications, with AC performance that includes 66dB SNR n Clock Duty Cycle Stabilizer and 76dB spurious free dynamic range (SFDR). Auxiliary n Single 3V to 3.3V Supply DACs allow gain balancing between channels. n Low Power: 1.3W (665mW/ch.) n Shutdown and Nap Modes A single 3V supply allows low power operation. A separate n 15mm × 11.25mm LGA Package output supply allows the outputs to drive 0.5V to 3.3V logic. An optional multiplexer allows both channels to share a
APPLICATIONS
digital output bus. Two single-ended CLK inputs can be driven together or independently. An optional clock duty n Telecommunications cycle stabilizer allows high performance at full speed for n Direct Conversion Receivers a wide range of clock duty cycles. n Main and Diversity Receivers L n , LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks of Linear Cellular Base Stations Technology Corporation. All other trademarks are the property of their respective owners.
TYPICAL APPLICATION Dual Channel IF Receiver 64k Point FFT, fIN = 15MHz, –1dBFS,
V
SENSE = V
CC = 3V
DD, Channel A (LTM9002-LA)
VDD 0 OVDD –10 VREF 0.5V TO 3.6V –20 –30 INA+ MAIN 14-BIT –40 FILTER RF SAW 125Msps ADC INA– –50 LO –60 CLKOUT DAC –70 DIFFERENTIAL ADC CLK SPI AMPLIFIERS –80 MUX AMPLITUDE (dBFS) OF DAC –90 –100 INB+ –110 DIVERSITY 14-BIT FILTER RF SAW 125Msps ADC INB– –120 0 5 10 15 20 25 30 LO FREQUENCY (MHz) 9002 TA01 OGND 9002 TA01b GND 9002f 1