Datasheet LTM9013 (Analog Devices) - 6

制造商Analog Devices
描述300MHz Wideband Receiver
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DigiTal inpuTs anD ouTpuTs. The. denotes the specifications which apply over the full operating

DigiTal inpuTs anD ouTpuTs The denotes the specifications which apply over the full operating

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LTM9013
DigiTal inpuTs anD ouTpuTs The
l
denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. (Notes 5, 7) SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS Data Outputs (OVDD = 1.8V)
Differential Output Voltage 100Ω Differential Load, 3.5mA Mode l 247 350 454 mV 100Ω Differential Load, 1.75mA Mode l 125 175 250 mV Common Mode Output Voltage 100Ω Differential Load, 3.5mA Mode l 1.125 1.250 1.375 V 100Ω Differential Load, 1.75mA Mode l 1.125 1.250 1.375 V On-Chip Termination Resistance Termination Enabled, OVDD = 1.8V 100 Ω
power requireMenTs The
l
denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. (Notes 5, 7) SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
VCC1 Demodulator and Amplifier Supply Voltage l 4.75 5.25 V VCC2 Amplifier Analog Supply Voltage l 2.7 3.3 3.6 V VDD ADC Analog Supply Voltage l 1.74 1.8 1.9 V OVDD ADC Digital Output Supply Voltage l 1.74 1.8 1.9 V ICC1 Demodulator and Amplifier Supply Current l 285 330 mA ICC1(SHDN) Demodulator and Amplifier Shutdown EN = 0V, EN_I, EN_Q = 3.3V, SHDN_I, l 16 20 mA Current SHDN_Q = 0V ICC2 Amplifier Supply Current l 132 160 mA IDD ADC Supply Current l 335 385 mA IOVDD Digital Supply Current 3.5mA Mode 80 90 mA ADC Sleep Power ADC Programmed for Sleep Mode, No CLK 5 mW Total Power Dissipation 2.6 W
TiMing characTerisTics The
l
denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. (Notes 5, 7) SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
fS Sampling Frequency l 1 310 MHz tL CLK Low Time Duty Cycle Stabilizer Off (Note 10) l 1.5 1.6 50 ns Duty Cycle Stabilizer On (Note 10) l 1.2 1.6 50 ns tH CLK High Time Duty Cycle Stabilizer Off (Note 10) l 1.5 1.6 50 ns Duty Cycle Stabilizer On (Note 10) l 1.2 1.6 50 ns tJITTER Sample-and-Hold Acquisition Delay Time 0.15 psRMS Jitter tAP Sample-and-Hold Acquisition Delay Time 1 ns
DATA Outputs (Note 10)
tD CLK to DATA Delay CL = 5pF l 1.7 2 2.3 ns tC CLK to CLKOUT Delay CL = 5pF l 1.3 1.6 2 ns tSKEW DATA to CLKOUT Skew tD – tC l 0.3 0.4 0.55 ns 9013fa 6 For more information www.linear.com/LTM9013 Document Outline Features Applications Description Typical Application Absolute Maximum Ratings Pin Configuration Order Information Electrical Characteristics Dynamic Accuracy Analog Inputs and Outputs Digital Inputs and Outputs Power Requirements Timing Characteristics Typical Performance Characteristics Pin Functions Block Diagram Timing Diagrams Operation Applications Information Typical Applications Package Description Revision History Typical Application Related Parts