Datasheet LT3014 (Analog Devices) - 9

制造商Analog Devices
描述20mA, 3V to 80V Low Dropout Micropower Linear Regulator
页数 / 页16 / 9 — APPLICATIONS INFORMATION. Table 1. SOT-23 Measured Thermal Resistance. …
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APPLICATIONS INFORMATION. Table 1. SOT-23 Measured Thermal Resistance. COPPER AREA. THERMAL RESISTANCE. TOPSIDE. BACKSIDE

APPLICATIONS INFORMATION Table 1 SOT-23 Measured Thermal Resistance COPPER AREA THERMAL RESISTANCE TOPSIDE BACKSIDE

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LT3014
APPLICATIONS INFORMATION
Voltage and temperature coeffi cients are not the only For surface mount devices, heat sinking is accomplished sources of problems. Some ceramic capacitors have a by using the heat spreading capabilities of the PC board piezoelectric response. A piezoelectric device generates and its copper traces. Copper board stiffeners and plated voltage across its terminals due to mechanical stress, simi- through-holes can also be used to spread the heat gener- lar to the way a piezoelectric accelerometer or microphone ated by power devices. works. For a ceramic capacitor the stress can be induced The following table lists thermal resistance for several by vibrations in the system or thermal transients. different board sizes and copper areas. All measurements 20 BOTH CAPACITORS ARE 16V, were taken in still air on 3/32” FR-4 board with one ounce 1210 CASE SIZE, 10μF copper. 0 X5R
Table 1. SOT-23 Measured Thermal Resistance
–20
COPPER AREA
ALUE (%)
THERMAL RESISTANCE
–40
TOPSIDE BACKSIDE BOARD AREA (JUNCTION-TO-AMBIENT)
2500 sq mm 2500 sq mm 2500 sq mm 125°C/W –60 CHANGE IN V Y5V 1000 sq mm 2500 sq mm 2500 sq mm 125°C/W –80 225 sq mm 2500 sq mm 2500 sq mm 130°C/W –100 100 sq mm 2500 sq mm 2500 sq mm 135°C/W 0 2 4 6 8 10 12 14 16 DC BIAS VOLTAGE (V) 50 sq mm 2500 sq mm 2500 sq mm 150°C/W 3014 F02
Table 2. DFN Measured Thermal Resistance Figure 2. Ceramic Capacitor DC Bias Characteristics COPPER AREA THERMAL RESISTANCE TOPSIDE BACKSIDE BOARD AREA (JUNCTION-TO-AMBIENT) Thermal Considerations
2500 sq mm 2500 sq mm 2500 sq mm 40°C/W The power handling capability of the device will be limited 1000 sq mm 2500 sq mm 2500 sq mm 45°C/W by the maximum rated junction temperature (125°C). The 225 sq mm 2500 sq mm 2500 sq mm 50°C/W power dissipated by the device will be made up of two 100 sq mm 2500 sq mm 2500 sq mm 62°C/W components: 1. Output current multiplied by the input/output voltage For the DFN package, the thermal resistance junction-to- differential: I case ( OUT • (VIN – VOUT) and, θJC), measured at the Exposed Pad on the back of the die, is 16°C/W. 2. GND pin current multiplied by the input voltage: 40 IGND • VIN. 20 The GND pin current can be found by examining the GND 0 Pin Current curves in the Typical Performance Character- X5R istics. Power dissipation will be equal to the sum of the –20 two components listed above. –40 Y5V The LT3014 regulator has internal thermal limiting de- –60 CHANGE IN VALUE (%) signed to protect the device during overload conditions. –80 For continuous normal conditions the maximum junction BOTH CAPACITORS ARE 16V, 1210 CASE SIZE, 10μF temperature rating of 125°C must not be exceeded. It is –100 –50 –25 0 25 50 75 100 125 important to give careful consideration to all sources of TEMPERATURE (oC) thermal resistance from junction to ambient. Additional 3014 F03 heat sources mounted nearby must also be considered.
Figure 3. Ceramic Capacitor Temperature Characteristics
3014fd 9