LT3082 APPLICATIONS INFORMATIONTable 1. 1% Resistors for Common Output VoltagesIf guard ring techniques are used, this bootstraps anyVOUT (V)RSET (k)stray capacitance at the SET pin. Since the SET pin is 1 100 a high impedance node, unwanted signals may couple 1.2 121 into the SET pin and cause erratic behavior. This will 1.5 150 be most noticeable when operating with minimum 1.8 182 output capacitors at full load current. The easiest way 2.5 249 to remedy this is to bypass the SET pin with a small 3.3 332 amount of capacitance from SET to ground; 10pF to 5 499 20pF is suffi cient.Stability and Output Capacitance With a 10μA current source generating the reference voltage, leakage paths to or from the SET pin can create The LT3082 requires an output capacitor for stability. It errors in the reference and output voltages. High qual- is designed to be stable with most low ESR capacitors ity insulation should be used (e.g., Tefl on, Kel-F). The (typically ceramic, tantalum or low ESR electrolytic). A cleaning of all insulating surfaces to remove fl uxes and minimum output capacitor of 2.2μF with an ESR of 0.5Ω other residues may be required. Surface coating may be or less is recommended to prevent oscillations. Larger necessary to provide a moisture barrier in high humidity values of output capacitance decrease peak deviations environments. and provide improved transient response for larger load current changes. Bypass capacitors, used to decouple Minimize board leakage by encircling the SET pin and individual components powered by the LT3082, increase circuitry with a guard ring that is operated at a potential the effective output capacitor value. For improvement in close to itself. Tie the guard ring to the OUT pin. Guarding transient response performance, place a capacitor across both sides of the circuit board is required. Bulk leakage the voltage setting resistor. Capacitors up to 1μF can be reduction depends on the guard ring width. 10nA of leak- used. This bypass capacitor reduces system noise as well, age into or out of the SET pin and its associated circuitry but start-up time is proportional to the time constant of creates a 0.1% reference voltage error. Leakages of this the voltage setting resistor (R magnitude, coupled with other sources of leakage, can SET in Figure 1) and SET pin bypass capacitor. cause signifi cant offset voltage and reference drift, es- pecially over the possible operating temperature range. Give extra consideration to the use of ceramic capacitors. Figure 2 depicts an example guard ring layout. Ceramic capacitors are manufactured with a variety of di- OUT SET GND 3082 F02 Figure 2. Example Guard Ring Layout for DFN Package 3082f 9