Datasheet LTC3026 (Analog Devices) - 7
| 制造商 | Analog Devices |
| 描述 | 1.5A Low Input Voltage VLDO Linear Regulator |
| 页数 / 页 | 18 / 7 — pin FuncTions IN (Pins 1, 2):. SHDN (Pin 6):. GND (Pin 3, Exposed Pad Pin … |
| 文件格式/大小 | PDF / 266 Kb |
| 文件语言 | 英语 |
pin FuncTions IN (Pins 1, 2):. SHDN (Pin 6):. GND (Pin 3, Exposed Pad Pin 11):. PG (Pin 7):. SW (Pin 4):. ADJ (Pin 8):
该数据表的模型线
文件文字版本
LTC3026
pin FuncTions IN (Pins 1, 2):
Input Supply Voltage. Output load current has been achieved. When providing an external BST volt- is supplied directly from IN. The IN pin should be locally age (i.e. boost converter disabled) a 1µF low ESR ceramic bypassed to ground if the LTC3026 is more than a few capacitor can be used. inches away from another source of bulk capacitance.
SHDN (Pin 6):
Shutdown Input Pin, Active Low. This pin In general, the output impedance of a battery rises with is used to put the LTC3026 into shutdown. The SHDN pin frequency, so it is usually advisable to include an input current is typically less than 10nA. The SHDN pin cannot bypass capacitor when supplying IN from a battery. A be left floating and must be tied to a valid logic level (such capacitor in the range of 0.1µF to 4.7µF is usually sufficient. as IN) if not used.
GND (Pin 3, Exposed Pad Pin 11):
Ground and Heat Sink.
PG (Pin 7):
Power Good Pin. When PG is high impedance Connect the exposed pad to the PCB ground plane or large OUT is in regulation, and low impedance when OUT is in pad for optimum thermal performance. shutdown or out of regulation.
SW (Pin 4):
Boost Switching Pin. This is the boost converter
ADJ (Pin 8):
Output Adjust Pin. This is the input to the error switching pin. A 4.7µH to 40µH inductor able to handle a amplifier. It has a typical bias current of 0.1nA flowing into peak current of 150mA is connected from this pin to VIN. the pin. The ADJ pin reference voltage is 0.4V referenced The boost converter can be disabled by floating this pin. to ground. The output voltage range is 0.4V to 2.6V and is This allows the use of an external boosted supply from typically set by connecting ADJ to a resistor divider from a second LTC3026 or other source. See Operating with OUT to GND. See Figure 2. Boost Converter Disabled section for more information.
OUT (Pins 9, 10):
Regulated Output Voltage. The OUT pins
BST (Pin 5):
Boost Output Voltage Pin. With boost con- supply power to the load. A minimum output capacitance verter enabled bypass the BST pin with a ≥4.7µF low ESR of 5µF is required to ensure stability. Larger output capaci- ceramic capacitor to GND (CBST). BST does not load VIN tors may be required for applications with large transient when in shutdown, but is diode connected to IN through loads to limit peak voltage transients. See the Applica- the external inductor, thus, will not go to ground with VIN tions Information section for more information on output present. Users should not present any loads to the BST capacitance. pin (with boost enabled) until PG signals that regulation 3026ff 7 Document Outline Features Applications Description Typical Application Absolute Maximum Ratings Pin Configuration Order Information Electrical Characteristics Typical Performance Characteristics Pin Functions Block Diagram Operation Typical Applications Package Description Revision History Typical Application Related Parts
pin FuncTions IN (Pins 1, 2):
Input Supply Voltage. Output load current has been achieved. When providing an external BST volt- is supplied directly from IN. The IN pin should be locally age (i.e. boost converter disabled) a 1µF low ESR ceramic bypassed to ground if the LTC3026 is more than a few capacitor can be used. inches away from another source of bulk capacitance.
SHDN (Pin 6):
Shutdown Input Pin, Active Low. This pin In general, the output impedance of a battery rises with is used to put the LTC3026 into shutdown. The SHDN pin frequency, so it is usually advisable to include an input current is typically less than 10nA. The SHDN pin cannot bypass capacitor when supplying IN from a battery. A be left floating and must be tied to a valid logic level (such capacitor in the range of 0.1µF to 4.7µF is usually sufficient. as IN) if not used.
GND (Pin 3, Exposed Pad Pin 11):
Ground and Heat Sink.
PG (Pin 7):
Power Good Pin. When PG is high impedance Connect the exposed pad to the PCB ground plane or large OUT is in regulation, and low impedance when OUT is in pad for optimum thermal performance. shutdown or out of regulation.
SW (Pin 4):
Boost Switching Pin. This is the boost converter
ADJ (Pin 8):
Output Adjust Pin. This is the input to the error switching pin. A 4.7µH to 40µH inductor able to handle a amplifier. It has a typical bias current of 0.1nA flowing into peak current of 150mA is connected from this pin to VIN. the pin. The ADJ pin reference voltage is 0.4V referenced The boost converter can be disabled by floating this pin. to ground. The output voltage range is 0.4V to 2.6V and is This allows the use of an external boosted supply from typically set by connecting ADJ to a resistor divider from a second LTC3026 or other source. See Operating with OUT to GND. See Figure 2. Boost Converter Disabled section for more information.
OUT (Pins 9, 10):
Regulated Output Voltage. The OUT pins
BST (Pin 5):
Boost Output Voltage Pin. With boost con- supply power to the load. A minimum output capacitance verter enabled bypass the BST pin with a ≥4.7µF low ESR of 5µF is required to ensure stability. Larger output capaci- ceramic capacitor to GND (CBST). BST does not load VIN tors may be required for applications with large transient when in shutdown, but is diode connected to IN through loads to limit peak voltage transients. See the Applica- the external inductor, thus, will not go to ground with VIN tions Information section for more information on output present. Users should not present any loads to the BST capacitance. pin (with boost enabled) until PG signals that regulation 3026ff 7 Document Outline Features Applications Description Typical Application Absolute Maximum Ratings Pin Configuration Order Information Electrical Characteristics Typical Performance Characteristics Pin Functions Block Diagram Operation Typical Applications Package Description Revision History Typical Application Related Parts