Datasheet LT1610 (Analog Devices) - 5
| 制造商 | Analog Devices |
| 描述 | 1.7MHz, Single Cell Micropower DC/DC Converter |
| 页数 / 页 | 16 / 5 — PIN FUNCTIONS VC (Pin 1):. SW (Pin 5):. IN (Pin 6):. GND (Pin 7):. FB … |
| 文件格式/大小 | PDF / 224 Kb |
| 文件语言 | 英语 |
PIN FUNCTIONS VC (Pin 1):. SW (Pin 5):. IN (Pin 6):. GND (Pin 7):. FB (Pin 2):. COMP (Pin 8):. SHDN (Pin 3):. PGND (Pin 4):
该数据表的模型线
文件文字版本
LT1610
U U U PIN FUNCTIONS VC (Pin 1):
Error Amplifier Output. Frequency compensa-
SW (Pin 5):
Switch Pin. Connect inductor/diode here. tion network must be connected to this pin, either internal Minimize trace area at this pin to keep EMI down. (COMP pin) or external series RC to ground. 220kΩ/
V
220pF typical value.
IN (Pin 6):
Input Supply Pin. Must be locally bypassed.
GND (Pin 7):
Signal Ground. Carries all device ground
FB (Pin 2):
Feedback Pin. Reference voltage is 1.23V. current except switch current. Tie to local ground plane. Connect resistive divider tap here. Minimize trace area at FB. Set VOUT according to VOUT = 1.23V (1 + R1/R2).
COMP (Pin 8):
Internal Compensation Network. Tie to VC pin, or let float if external compensation is used. Output
SHDN (Pin 3):
Shutdown. Ground this pin to turn off capacitor must be tantalum if COMP pin is used for com- device. Tie to 1V or more to enable. pensation.
PGND (Pin 4):
Power Ground. Tie directly to local ground plane.
W BLOCK DIAGRA
VIN 6 VIN R5 R6 40k 40k VOUT + A1 1 VC SHUTDOWN 3 SHDN R1 gm (EXTERNAL) – 8 COMP 7 GND FB Q1 Q2 FB 2 × R 10 C R2 R3 CC (EXTERNAL) 30k R4 140k + ENABLE BIAS – 5 SW – COMPARATOR FF DRIVER RAMP A2 R Q Q3 GENERATOR + S Σ + A = 3 0.15Ω 1.7MHz OSCILLATOR – 4 PGND 1610 F02
Figure 2. LT1610 Block Diagram
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U U U PIN FUNCTIONS VC (Pin 1):
Error Amplifier Output. Frequency compensa-
SW (Pin 5):
Switch Pin. Connect inductor/diode here. tion network must be connected to this pin, either internal Minimize trace area at this pin to keep EMI down. (COMP pin) or external series RC to ground. 220kΩ/
V
220pF typical value.
IN (Pin 6):
Input Supply Pin. Must be locally bypassed.
GND (Pin 7):
Signal Ground. Carries all device ground
FB (Pin 2):
Feedback Pin. Reference voltage is 1.23V. current except switch current. Tie to local ground plane. Connect resistive divider tap here. Minimize trace area at FB. Set VOUT according to VOUT = 1.23V (1 + R1/R2).
COMP (Pin 8):
Internal Compensation Network. Tie to VC pin, or let float if external compensation is used. Output
SHDN (Pin 3):
Shutdown. Ground this pin to turn off capacitor must be tantalum if COMP pin is used for com- device. Tie to 1V or more to enable. pensation.
PGND (Pin 4):
Power Ground. Tie directly to local ground plane.
W BLOCK DIAGRA
VIN 6 VIN R5 R6 40k 40k VOUT + A1 1 VC SHUTDOWN 3 SHDN R1 gm (EXTERNAL) – 8 COMP 7 GND FB Q1 Q2 FB 2 × R 10 C R2 R3 CC (EXTERNAL) 30k R4 140k + ENABLE BIAS – 5 SW – COMPARATOR FF DRIVER RAMP A2 R Q Q3 GENERATOR + S Σ + A = 3 0.15Ω 1.7MHz OSCILLATOR – 4 PGND 1610 F02
Figure 2. LT1610 Block Diagram
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