Datasheet LT1618 (Analog Devices) - 8

制造商Analog Devices
描述Constant-Current/Constant-Voltage 1.4MHz Step-Up DC/DC Converter
页数 / 页16 / 8 — APPLICATIONS INFORMATION. Switch Node Considerations. Frequency …
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APPLICATIONS INFORMATION. Switch Node Considerations. Frequency Compensation. Figure 3

APPLICATIONS INFORMATION Switch Node Considerations Frequency Compensation Figure 3

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LT1618
U U W U APPLICATIONS INFORMATION
When sensing input current, the sense resistor should be loop transfer function of a switching regulator, so the VC placed in front of the inductor (between the decoupling pin pole and zero are positioned to provide the best loop capacitor and the inductor) as shown in the circuits in the response. A thorough analysis of the switching regulator Typical Applications section. This will regulate the average control loop is not within the scope of this data sheet, and inductor current and maintain a consistent inductor ripple will not be presented here, but values of 2kΩ and 10nF will current, which will, in turn, maintain a well regulated input be a good choice for many designs. For those wishing to current. Do not place the sense resistor between the input optimize the compensation, use the 2kΩ and 10nF as a source and the input decoupling capacitor, as this may starting point. For LED backlight applications where a allow the inductor ripple current to vary widely (even pulse-width modulation (PWM) signal is used to drive though the average input current and the average inductor the IADJ pin, the resistor is usually not included in the current will still be regulated). Since the inductor current compensation network. This helps to provide additional is a triangular waveform (not a DC waveform like the filtering of the PWM signal at the output of the error output current) some tweaking of the compensation amplifier (the VC pin). values (RC and CC on the VC pin) may be required to ensure a clean inductor ripple current while the constant-current
Switch Node Considerations
loop is in effect. For these applications, the constant- To maximize efficiency, switch rise and fall times are made current loop response can usually be improved by reduc- as short as possible. To prevent radiation and high fre- ing the RC value, or by adding a capacitor (with a value of quency resonance problems, proper layout of the high approximately CC/10) in parallel with the RC and CC frequency switching path is essential. Keep the output compensation network. switch (SW pin), diode and output capacitor as close together as possible. Minimize the length and area of all
Frequency Compensation
traces connected to the switch pin, and always use a The LT1618 has an external compensation pin (VC), which ground plane under the switching regulator to minimize allows the loop response to be optimized for each applica- interplane coupling. The high speed switching current tion. An external resistor and capacitor (or sometimes just path is shown in Figure 3. The signal path including the a capacitor) are placed at the VC pin to provide a pole and switch, output diode and output capacitor contains nano- a zero (or just a pole) to ensure proper loop compensation. second rise and fall times and should be kept as short as Numerous other poles and zeroes are present in the closed possible. SWITCH L1 NODE VOUT HIGH VIN FREQUENCY LOAD CIRCULATING PATH 1618 • F03
Figure 3
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