Datasheet LT3473, LT3473A (Analog Devices) - 5
| 制造商 | Analog Devices |
| 描述 | Micropower 1A Boost Converter with Schottky and Output Disconnect |
| 页数 / 页 | 12 / 5 — TYPICAL PERFOR A CE CHARACTERISTICS TA = 25. C unless otherwise noted. … |
| 文件格式/大小 | PDF / 276 Kb |
| 文件语言 | 英语 |
TYPICAL PERFOR A CE CHARACTERISTICS TA = 25. C unless otherwise noted. SHDN Voltage to Turn-On
该数据表的模型线
文件文字版本
LT3473/LT3473A
W U TYPICAL PERFOR A CE CHARACTERISTICS TA = 25
°
C unless otherwise noted. SHDN Voltage to Turn-On Disconnect PNP Quiescent Current Disconnect PNP Auxiliary NPN VBE
1.4 0.9 1.00 A) µ 0.8 0.95 1.2 0.7 0.90 1.0 0.6 0.85 IE = 1mA 0.80 0.8 0.5 (V) BE 0.75 0.6 0.4 NPN V 0.70 0.3 0.4 SHDN VOLTAGE (V) 0.65 0.2 IE = 100µA 0.60 0.2 0.1 0.55 DISCONNECT PNP QUIESCENT CURRENT ( 0 0 0.50 0 5 10 15 20 25 30 35 40 0 20 40 60 80 100 –50 0 50 100 CAP VOLTAGE (V) OUTPUT CURRENT (mA) TEMPERATURE (°C) 3473 G13 3473 G14 3473 G15
U U U PI FU CTIO S (LT3473/LT3473A) CAP (Pin 1/Pin 1):
Internal Output Voltage. This pin is the
SHDN (Pin 6/Pin 10):
Shutdown Pin. Connect to 1.4V or Schottky cathode and disconnect PNP emitter. Connect higher to enable device; 0.2V or less to disable device. Also output capacitor here. functions as soft-start. Use RC filter as shown in Figure 4.
OUT (Pin 2/Pin 2):
Output of Disconnect Circuit. Bypass
VIN (Pin 7/Pin 11):
Input Supply Pin. Must be locally this pin with capacitor to ground. bypassed with a X5R or X7R type ceramic capacitor.
CTRL (Pin 3/Pin 8):
External Reference Pin. This pin sets
SW (Pin 8/Pin 12):
Switch Pin. Connect inductor here. the FB voltage externally between 0V and 1.25V. Tie this Minimize the metal trace area connected to the pin to pin 1.5V or higher to use the internal 1.25V reference. minimize EMI.
FB (Pin 4/Pin 7):
Feedback Pin. Pin voltage is regulated to
Exposed Pad (Pin 9/Pin 13):
Ground. Solder directly to 1.25V if internal reference is used or to the CTRL pin PCB ground plane through multiple vias under the pack- voltage if the CTRL pin voltage is between 0V and 1.25V. age for optimum thermal performance. Connect the feedback resistor divider to this pin. The
LT3473A Only
output voltage is regulated to:
NB1 (Pin 3):
NPN1 Base. ⎛ R2 ⎞ V = V
NE1 (Pin 4):
NPN1 Emitter. OUT REF • ⎜ + ⎟ 1 ⎝ R1 ⎠
NB2 (Pin 5):
NPN2 Base.
PGOOD (Pin 5/Pin 9):
Power Good Output. Open collector
NE2 (Pin 6):
NPN2 Emitter. logic output that starts to sink current when FB reaches within 100mV of the reference voltage. 3473f 5
W U TYPICAL PERFOR A CE CHARACTERISTICS TA = 25
°
C unless otherwise noted. SHDN Voltage to Turn-On Disconnect PNP Quiescent Current Disconnect PNP Auxiliary NPN VBE
1.4 0.9 1.00 A) µ 0.8 0.95 1.2 0.7 0.90 1.0 0.6 0.85 IE = 1mA 0.80 0.8 0.5 (V) BE 0.75 0.6 0.4 NPN V 0.70 0.3 0.4 SHDN VOLTAGE (V) 0.65 0.2 IE = 100µA 0.60 0.2 0.1 0.55 DISCONNECT PNP QUIESCENT CURRENT ( 0 0 0.50 0 5 10 15 20 25 30 35 40 0 20 40 60 80 100 –50 0 50 100 CAP VOLTAGE (V) OUTPUT CURRENT (mA) TEMPERATURE (°C) 3473 G13 3473 G14 3473 G15
U U U PI FU CTIO S (LT3473/LT3473A) CAP (Pin 1/Pin 1):
Internal Output Voltage. This pin is the
SHDN (Pin 6/Pin 10):
Shutdown Pin. Connect to 1.4V or Schottky cathode and disconnect PNP emitter. Connect higher to enable device; 0.2V or less to disable device. Also output capacitor here. functions as soft-start. Use RC filter as shown in Figure 4.
OUT (Pin 2/Pin 2):
Output of Disconnect Circuit. Bypass
VIN (Pin 7/Pin 11):
Input Supply Pin. Must be locally this pin with capacitor to ground. bypassed with a X5R or X7R type ceramic capacitor.
CTRL (Pin 3/Pin 8):
External Reference Pin. This pin sets
SW (Pin 8/Pin 12):
Switch Pin. Connect inductor here. the FB voltage externally between 0V and 1.25V. Tie this Minimize the metal trace area connected to the pin to pin 1.5V or higher to use the internal 1.25V reference. minimize EMI.
FB (Pin 4/Pin 7):
Feedback Pin. Pin voltage is regulated to
Exposed Pad (Pin 9/Pin 13):
Ground. Solder directly to 1.25V if internal reference is used or to the CTRL pin PCB ground plane through multiple vias under the pack- voltage if the CTRL pin voltage is between 0V and 1.25V. age for optimum thermal performance. Connect the feedback resistor divider to this pin. The
LT3473A Only
output voltage is regulated to:
NB1 (Pin 3):
NPN1 Base. ⎛ R2 ⎞ V = V
NE1 (Pin 4):
NPN1 Emitter. OUT REF • ⎜ + ⎟ 1 ⎝ R1 ⎠
NB2 (Pin 5):
NPN2 Base.
PGOOD (Pin 5/Pin 9):
Power Good Output. Open collector
NE2 (Pin 6):
NPN2 Emitter. logic output that starts to sink current when FB reaches within 100mV of the reference voltage. 3473f 5