Datasheet LT3740 (Analog Devices) - 9
| 制造商 | Analog Devices |
| 描述 | Wide Operating Range, Valley Mode, No RSENSE Synchronous Step-Down Controller |
| 页数 / 页 | 20 / 9 — APPLICATIONS INFORMATION. Figure 2. Circuit That Prevents Operation for … |
| 文件格式/大小 | PDF / 244 Kb |
| 文件语言 | 英语 |
APPLICATIONS INFORMATION. Figure 2. Circuit That Prevents Operation for VIN < 7V
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LT3740
APPLICATIONS INFORMATION
The ρT term is a normalization factor (unity at 25°C) of the circuit. One of the solution circuits is shown in accounting for the signifi cant variation in on-resistance Figure 2. The Zener diode and the small MOSFET limit the with temperature, typically about 0.4%/°C as shown in SHDN voltage to be about 6V below VIN. This shuts down Figure 1. For a maximum junction temperature of 100°C, the LT3740 for VIN lower than 7V. If VIN can ramp up to using a value ρT = 1.3 is reasonable. 7V quick enough, this circuit is not necessary. 2.0 LT3740 VGS = 10V VIN ID = 14A 1.6 MMSZ52312BS 2N7002TA ANCE BGDP 1.2 100k SHDN – ON RESIST 0.8 3740 F02 (NORMALIZED) DS(ON)R
Figure 2. Circuit That Prevents Operation for VIN < 7V
0.4 0 For VIN higher than 14V, the high dv/dt at SW node and –50 –25 0 25 50 75 100 125 150 the strong drive of BGATE can generate extra noise and TJ – JUNCTION TEMPERATURE (°C) affect the operation. A resistor R 3740 F01 BG of 1Ω-2Ω between BGATE and the gate of the bottom MOSFET as shown in
Figure 1. MOSFET RDS(ON) vs. Temperature
Figure 3 can effectively reduce the noise.
Gate Drives
LT3740 The top gate drive power is provided by BIAS which is about SW 7.8V higher than VIN. The top gate voltage can be as high RBG M2 as 7.8V and can droop to about 5.5V if the on-time is long BGATE enough. The bottom gate drive power is provided by the BGDP pin. BGDP needs to be connected to 7V or higher PGND to get enough gate drive voltage for logic-level threshold 3740 F03 MOSFETs. BGDP can be connected to VIN, BIAS or an
Figure 3. Noise Reduction for Bottom MOSFET
external voltage supply. For input voltages lower than 7V, BGDP should be connected to BIAS to be able to use The LT3740 uses adaptive dead time control to prevent logic-level threshold MOSFETs. For VIN higher than 7V, the top and bottom MOSFET shoot-through and minimize BGDP can be connected to VIN to reduce power loss in the the dead time. When the internal top MOSFET on signal bottom gate drive. For high BGDP voltages, the internal comes, the LT3740 delays the turn on of TGATE until clamp circuit limits the bottom gate drive voltage to about BGATE is off. When the internal bottom MOSFET on signal 8V to prevent the gate from overvoltage damage. comes, the LT3740 delays the turn on of BGATE until the For the case BGDP is connected to VIN, if VIN voltage ramp SW node swings down to ground. In the case of small up slowly during startup, there will be a considerable period or negative inductor current that SW node cannot swing of time that BGDP is below 7V and the circuit is operating. below ground after TGATE turns off, BGATE will turn on The insuffi cient voltage on BGDP could cause malfunction 200ns after TGATE is off. 3740fc 9
APPLICATIONS INFORMATION
The ρT term is a normalization factor (unity at 25°C) of the circuit. One of the solution circuits is shown in accounting for the signifi cant variation in on-resistance Figure 2. The Zener diode and the small MOSFET limit the with temperature, typically about 0.4%/°C as shown in SHDN voltage to be about 6V below VIN. This shuts down Figure 1. For a maximum junction temperature of 100°C, the LT3740 for VIN lower than 7V. If VIN can ramp up to using a value ρT = 1.3 is reasonable. 7V quick enough, this circuit is not necessary. 2.0 LT3740 VGS = 10V VIN ID = 14A 1.6 MMSZ52312BS 2N7002TA ANCE BGDP 1.2 100k SHDN – ON RESIST 0.8 3740 F02 (NORMALIZED) DS(ON)R
Figure 2. Circuit That Prevents Operation for VIN < 7V
0.4 0 For VIN higher than 14V, the high dv/dt at SW node and –50 –25 0 25 50 75 100 125 150 the strong drive of BGATE can generate extra noise and TJ – JUNCTION TEMPERATURE (°C) affect the operation. A resistor R 3740 F01 BG of 1Ω-2Ω between BGATE and the gate of the bottom MOSFET as shown in
Figure 1. MOSFET RDS(ON) vs. Temperature
Figure 3 can effectively reduce the noise.
Gate Drives
LT3740 The top gate drive power is provided by BIAS which is about SW 7.8V higher than VIN. The top gate voltage can be as high RBG M2 as 7.8V and can droop to about 5.5V if the on-time is long BGATE enough. The bottom gate drive power is provided by the BGDP pin. BGDP needs to be connected to 7V or higher PGND to get enough gate drive voltage for logic-level threshold 3740 F03 MOSFETs. BGDP can be connected to VIN, BIAS or an
Figure 3. Noise Reduction for Bottom MOSFET
external voltage supply. For input voltages lower than 7V, BGDP should be connected to BIAS to be able to use The LT3740 uses adaptive dead time control to prevent logic-level threshold MOSFETs. For VIN higher than 7V, the top and bottom MOSFET shoot-through and minimize BGDP can be connected to VIN to reduce power loss in the the dead time. When the internal top MOSFET on signal bottom gate drive. For high BGDP voltages, the internal comes, the LT3740 delays the turn on of TGATE until clamp circuit limits the bottom gate drive voltage to about BGATE is off. When the internal bottom MOSFET on signal 8V to prevent the gate from overvoltage damage. comes, the LT3740 delays the turn on of BGATE until the For the case BGDP is connected to VIN, if VIN voltage ramp SW node swings down to ground. In the case of small up slowly during startup, there will be a considerable period or negative inductor current that SW node cannot swing of time that BGDP is below 7V and the circuit is operating. below ground after TGATE turns off, BGATE will turn on The insuffi cient voltage on BGDP could cause malfunction 200ns after TGATE is off. 3740fc 9