Datasheet LT3759 (Analog Devices) - 7

LT3759
PIN FUNCTIONS DRIVE:
DRIVE LDO Supply Pin. This pin can be connected
PGOOD:
Output Ready Status Pin. An open-collector pull to either VIN or a quasi-regulated voltage supply such as down on PGOOD asserts when INTVCC is greater than a DC converter output. This pin must be bypassed with 2.7V and the FBX voltage is within 5% (80mV if VFBX = a minimum of 1µF capacitor placed close to the pin. Tie 1.6V or 40mV if VFBX = –0.8V) of the regulation voltage. this pin to VIN if not used.
RT:
Switching Frequency Adjustment Pin. Set the frequency
EN/UVLO:
Shutdown and Undervoltage Detect Pin. An using a resistor to GND. Do not leave the RT pin open. accurate 1.22V (nominal) falling threshold with externally
SENSE:
The Current Sense Input for the Control Loop. programmable hysteresis detects when power is okay to Kelvin connect this pin to the positive terminal of the enable switching. Rising hysteresis is generated by the switch current sense resistor in the source of the N-FET. external resistor divider and an accurate internal 2.2μA The negative terminal of the current sense resistor should pull-down current. An undervoltage condition resets soft- be connected to GND plane close to the IC. start. Tie to 0.4V, or less, to disable the device and reduce VIN quiescent current below 1μA.
SS:
Soft-Start Pin. This pin modulates compensation pin voltage (VC) clamp. The soft-start interval is set with an
FBX:
Voltage Regulation Feedback Pin for Positive or external capacitor. The pin has a 10µA (typical) pull-up Negative Outputs. Connect this pin to a resistor divider current source to an internal 2.5V rail. The soft-start pin between the output and GND. FBX is the input of two error is reset to GND by an EN/UVLO undervoltage condition, amplifiers—one configured to regulate a positive output; an INTV the other, a negative output. Depending upon topology CC undervoltage condition or an internal thermal lockout. selected, switching causes the output to ramp positive or negative. The appropriate amplifier takes control while the
SYNC:
Frequency Synchronization Pin. Used to synchronize other becomes inactive. Additionally FBX is input for two the internal oscillator to an outside clock. If this feature is window comparators that indicate through the PGOOD used, an RT resistor should be chosen to program a switch- pin when the output is within 5% of the regulation volt- ing frequency 20% slower than SYNC pulse frequency. ages. FBX also modulates the switching frequency during Tie the SYNC pin to GND if this feature is not used. This start-up and fault conditions when FBX is close to GND. signal is ignored during FB frequency foldback or when INTV
GATE:
N-Channel FET Gate Driver Output. Switches CC is less than 2.7V. between INTVCC and GND. Driven to GND when IC is shut
VC:
Error Amplifier Compensation Pin. Used to stabilize down, during thermal lockout or when INTVCC is below the voltage loop with an external RC network. undervoltage threshold.
VIN:
Supply Pin for Internal Leads and the VIN LDO
GND:
Exposed Pad. Solder the exposed pad directly to Regulator of INTVCC. Must be locally bypassed with a ground plane. minimum of 1µF capacitor placed close to this pin.
INTVCC:
Regulated Supply for Internal Loads and Gate Driver. Regulated to 4.75V if powered from DRIVE or regulated to 3.75V if powered from VIN. The INTVCC pin must be bypassed with a minimum of 4.7µF capacitor placed close to the pin. 3759fc For more information www.linear.com/3759 7 Document Outline Features Applications Description Typical Application Absolute Maximum Ratings Pin Configuration Order Information Electrical Characteristics Typical Performance Characteristics Pin Functions Block Diagram Applications Information Typical Applications Package Description Revision History Related Parts