Datasheet LT8330 (Analog Devices) - 8

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operaTion
The LT8330 uses a fixed frequency, current mode control generate a negative output voltage. When configured as scheme to provide excellent line and load regulation. Op- a boost converter, as shown in the Block Diagram, the eration can be best understood by referring to the Block FBX pin is pulled up to the internal bias voltage of 1.60V Diagram. An internal 2MHz oscillator turns on the internal by a voltage divider (R1 and R2) connected from VOUT power switch at the beginning of each clock cycle. Current to GND. Amplifier A2 becomes inactive and amplifier A1 in the inductor then increases until the current comparator performs (inverting) amplification from FBX to VC. When trips and turns off the power switch. The peak inductor the LT8330 is in an inverting configuration, the FBX pin current at which the switch turns off is controlled by the is pulled down to –0.80V by a voltage divider from VOUT voltage on the internal VC node. The error amplifier servos to GND. Amplifier A1 becomes inactive and amplifier A2 the VC node by comparing the voltage on the FBX pin with performs (non-inverting) amplification from FBX to VC. an internal reference voltage (1.60V or –0.80V, depending If the EN/UVLO pin voltage is below 1.6V, the LT8330 on the chosen topology). When the load current increases enters undervoltage lockout (UVLO), and stops switching. it causes a reduction in the FBX pin voltage relative to When the EN/UVLO pin voltage is above 1.68V (typical), the internal reference. This causes the error amplifier to the LT8330 resumes switching. If the EN/UVLO pin volt- increase the VC voltage until the new load current is satis- age is below 0.2V, the LT8330 only draws 1µA from V fied. In this manner, the error amplifier sets the correct IN. peak switch current level to keep the output in regulation. To optimize efficiency at light loads, the LT8330 operates in Burst Mode operation in light load situations. Between The LT8330 is capable of generating either a positive or bursts, all circuitry associated with controlling the output negative output voltage with a single FBX pin. It can be switch is shut down, reducing the input supply current configured as a boost or SEPIC converter to generate a to 6µA. positive output voltage, or as an inverting converter to
applicaTions inForMaTion ACHIEVING ULTRALOW QUIESCENT CURRENT
the output should also be minimized as they all add to the To enhance efficiency at light loads the LT8330 uses equivalent output load. The largest contributor to leakage a low ripple Burst Mode architecture. This keeps the current can be due to the reverse biased leakage of the output capacitor charged to the desired output voltage Schottky diode (see Diode Selection in the Applications while minimizing the input quiescent current and output Information section). ripple. In Burst Mode operation the LT8330 delivers single 2.5 small pulses of current to the output capacitor followed FRONT PAGE APPLICATION V by sleep periods where the output power is supplied by IN = 12V 2.0 the output capacitor. While in sleep mode the LT8330 VOUT = 48V consumes only 6µA. 1.5 As the output load decreases, the frequency of single cur- 1.0 rent pulses decreases (see Figure 1) and the percentage of time the LT8330 is in sleep mode increases, resulting 0.5 SWITCHING FREQUENCY (MHz) in much higher light load efficiency than for typical con- verters. To optimize the quiescent current performance 0 at light loads, the current in the feedback resistor divider 0 10 20 30 40 50 LOAD CURRENT (mA) must be minimized as it appears to the output as load 8330 F01 current. In addition, all possible leakage currents from
Figure 1. Burst Frequency vs Load Current
8330fa 8 For more information www.linear.com/LT8330 Document Outline Features Applications Typical Application Description Absolute Maximum Ratings Pin Configuration Order Information Electrical Characteristics Typical Performance Characteristics Pin Functions Block Diagram Operation Applications Information Typical Applications Package Description Revision History Typical Application Related Parts