Datasheet LTC1624 (Analog Devices) - 8

制造商Analog Devices
描述High Efficiency SO-8 N-Channel Switching Regulator Controller
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APPLICATIONS INFORMATION. Step-Down Converter: Power MOSFET Selection. Step-Down Converter: Output Diode Selection (D1)

APPLICATIONS INFORMATION Step-Down Converter: Power MOSFET Selection Step-Down Converter: Output Diode Selection (D1)

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LTC1624
U U W U APPLICATIONS INFORMATION Step-Down Converter: Power MOSFET Selection
characteristics. The constant k = 2.5 can be used to One external N-channel power MOSFET must be selected estimate the contributions of the two terms in the PMAIN for use with the LTC1624 for the top (main) switch. dissipation equation. The peak-to-peak gate drive levels are set by the INTVCC
Step-Down Converter: Output Diode Selection (D1)
voltage. This voltage is typically 5V. Consequently, logic The Schottky diode D1 shown in Figure 1 conducts during level threshold MOSFETs must be used in most LTC1624 the off-time. It is important to adequately specify the diode applications. If low input voltage operation is expected peak current and average power dissipation so as not to (VIN < 5V) sublogic level threshold MOSFETs should be exceed the diode ratings. used. Pay close attention to the BVDSS specification for the MOSFETs as well; many of the logic level MOSFETs are The most stressful condition for the output diode is under limited to 30V or less. short circuit (VOUT = 0V). Under this condition, the diode must safely handle ISC(PK) at close to 100% duty cycle. Selection criteria for the power MOSFET include the “ON” Under normal load conditions, the average current con- resistance RDS(ON), reverse transfer capacitance CRSS, ducted by the diode is simply: input voltage and maximum output current. When the  LTC1624 is operating in continuous mode the duty cycle I = I V − V DIODE AVG LOAD AVG IN OUT ( ) ( )  for the top MOSFET is given by:  V + V   IN D  V V OUT + D Remember to keep lead lengths short and observe proper Main Switch Duty Cycle = V + V grounding (see Board Layout Checklist) to avoid ringing IN D and increased dissipation. The MOSFET power dissipation at maximum output current is given by: The forward voltage drop allowable in the diode is calcu- lated from the maximum short-circuit current as: V + V 2 P OUT D = I ( ) (1 δ)   MAIN MAX + RDS ON + ( ) P V V D IN D V + V V ≈ + IN D D I  V SC AVG IN  ( ) 1 8 . 5 k V I C f ( ) ( )( )( ) IN MAX RSS where PD is the allowable diode power dissipation and will where δ is the temperature dependency of R be determined by efficiency and/or thermal requirements DS(ON) and k is a constant inversely related to the gate drive current. (see Efficiency Considerations). MOSFETs have I2R losses, plus the P
Step-Down Converter: C
MAIN equation
IN and COUT Selection
includes an additional term for transition losses that are In continuous mode the source current of the top highest at high output voltages. For VIN < 20V the high N-channel MOSFET is a square wave of approximate duty current efficiency generally improves with larger MOSFETs, cycle VOUT/VIN. To prevent large voltage transients, a low while for VIN > 20V the transition losses rapidly increase to ESR input capacitor sized for the maximum RMS current the point that the use of a higher RDS(ON) device with lower must be used. The maximum RMS capacitor current is CRSS actual provides higher efficiency. The diode losses given by: are greatest at high input voltage or during a short circuit when the diode duty cycle is nearly 100%. / V V [ ( −V )]1 2 OUT IN OUT The term (1+ δ) is generally given for a MOSFET in the form C Required I I IN RMS ≈ MAX V of a normalized R IN DS(ON) vs Temperature curve, but δ = 0.005/°C can be used as an approximation for low This formula has a maximum at VIN = 2VOUT, where voltage MOSFETs. CRSS is usually specified in the MOSFET IRMS = IOUT/2. This simple worst-case condition is com- 8