Datasheet LTC1772 (Analog Devices) - 7

LTC1772
U U W U APPLICATIONS INFORMATION
where f is the operating frequency. Accepting larger values Molypermalloy (from Magnetics, Inc.) is a very good, low of IRIPPLE allows the use of low inductances, but results in loss core material for toroids, but it is more expensive than higher output voltage ripple and greater core losses. A ferrite. A reasonable compromise from the same manu- reasonable starting point for setting ripple current is facturer is Kool Mµ. Toroids are very space efficient, IRIPPLE = 0.4(IOUT(MAX)). Remember, the maximum IRIPPLE especially when you can use several layers of wire. Be- occurs at the maximum input voltage. cause they generally lack a bobbin, mounting is more difficult. However, new designs for surface mount that do In Burst Mode operation on the LTC1772, the ripple not increase the height significantly are available. current is normally set such that the inductor current is continuous during the burst periods. Therefore, the peak-
Power MOSFET Selection
to-peak ripple current must not exceed: An external P-channel power MOSFET must be selected . for use with the LTC1772. The main selection criteria for IRIPPLE≤ 0 03 R the power MOSFET are the threshold voltage V SENSE GS(TH) and the “on” resistance RDS(ON), reverse transfer capacitance This implies a minimum inductance of: CRSS and total gate charge. V V ⎛ V + V ⎞ Since the LTC1772 is designed for operation down to low L IN OUT OUT D MIN = − ⎛ input voltages, a sublogic level threshold MOSFET (R . ⎞ ⎝⎜ V + V ⎠⎟ 0 03 DS(ON) f IN D guaranteed at V ⎝⎜ GS = 2.5V) is required for applications that RSENSE⎠⎟ work close to this voltage. When these MOSFETs are used, make sure that the input supply to the LTC1772 is less than (Use VIN(MAX) = VIN) the absolute maximum VGS rating, typically 8V. A smaller value than LMIN could be used in the circuit; The required minimum R however, the inductor current will not be continuous DS(ON) of the MOSFET is gov- erned by its allowable power dissipation. For applications during burst periods. that may operate the LTC1772 in dropout, i.e., 100% duty cycle, at its worst case the required R
Inductor Core Selection
DS(ON) is given by: Once the value for L is known, the type of inductor must be P R P = selected. High efficiency converters generally cannot af- DS ON ( )DC= % 100 2 I ( ) (1+ pδ) ford the core loss found in low cost powdered iron cores, OUT MAX ( ) forcing the use of more expensive ferrite, molypermalloy where PP is the allowable power dissipation and δp is the or Kool Mµ® cores. Actual core loss is independent of core temperature dependency of RDS(ON). (1 + δp) is generally size for a fixed inductor value, but it is very dependent on given for a MOSFET in the form of a normalized RDS(ON) vs inductance selected. As inductance increases, core losses temperature curve, but δp = 0.005/°C can be used as an go down. Unfortunately, increased inductance requires approximation for low voltage MOSFETs. more turns of wire and therefore copper losses will in- crease. Ferrite designs have very low core losses and are In applications where the maximum duty cycle is less than preferred at high switching frequencies, so design goals 100% and the LTC1772 is in continuous mode, the RDS(ON) can concentrate on copper loss and preventing saturation. is governed by: Ferrite core material saturates “hard,” which means that P inductance collapses abruptly when the peak design cur- R P DS ON ( ) ≅ 2 rent is exceeded. This results in an abrupt increase in DC ( )I (1+ p δ ) OUT inductor ripple current and consequent output voltage ripple. Do not allow the core to saturate! where DC is the maximum operating duty cycle of the LTC1772. 1772fb 7