Datasheet LTC1773 (Analog Devices) - 5
| 制造商 | Analog Devices |
| 描述 | Synchronous Step-Down DC/DC Controller |
| 页数 / 页 | 20 / 5 — PIN FUNCTIONS. ITH (Pin 1):. VFB (Pin 4):. GND (Pin 5):. RUN/SS (Pin 2):. … |
| 文件格式/大小 | PDF / 300 Kb |
| 文件语言 | 英语 |
PIN FUNCTIONS. ITH (Pin 1):. VFB (Pin 4):. GND (Pin 5):. RUN/SS (Pin 2):. BG (Pin 6):. TG (Pin 7):. SYNC/FCB (Pin 3):. VIN (Pin 8) :
该数据表的模型线
文件文字版本
LTC1773
U U U PIN FUNCTIONS ITH (Pin 1):
Error Amplifier Compensation Point. The
VFB (Pin 4):
Feedback Pin. Receives the feedback voltage current comparator threshold increases with this control from an external resistive divider across the output. Do not voltage. Nominal voltage range for this pin is 0V to 1.2V. use more than 0.01µF of feedforward capacitance from FB Under high duty cycle and nearing current limit, ITH can to the output. swing up to 2.4V.
GND (Pin 5):
Ground Pin.
RUN/SS (Pin 2):
Combination of Soft-Start and Run
BG (Pin 6):
Bottom Gate Driver of External N-Channel Control Inputs. A capacitor to ground at this pin sets the Power MOSFET. This pin swings from 0V to V ramp time to full current output. The time is approximately IN. 0.8s/µF. Forcing this pin below 0.4V shuts down all the
TG (Pin 7):
Top Gate Driver of External P-Channel Power circuitry. MOSFET. This pin swings from 0V to VIN.
SYNC/FCB (Pin 3):
Multifunction Pin. This pin performs
VIN (Pin 8) :
Main Supply Pin. Must be closely decoupled three functions: 1) secondary winding feedback input, 2) to GND (pin 5). external clock synchronization and 3) Burst Mode opera-
SENSE–(Pin 9):
The Negative Input to the Current Com- tion or forced continuous mode select. For secondary parator. A sense resistor between this pin and VIN sets the winding applications, connect to a resistive divider from peak current in the top switch. Connect this pin to the the secondary output. To synchronize with an external source of the external P-Channel power MOSFET. clock, apply a TTL/CMOS compatible clock with a fre- quency between 585kHz and 750kHz. To select Burst
SW (Pin 10):
Switch Node Connection to Inductor. This Mode operation, tie SYNC/FCB to V pin connects to the drains of the external main and IN. Grounding this pin forces continuous operation. synchronous power MOSFET switches.
U U W FUNCTIONAL DIAGRA
BURST Y Y = “0” ONLY WHEN X IS A CONSTANT “1” DEFEAT 0.4µA X SLOPE 8 V COMP IN SYNC/FCB 3 OSC 0.4V 9 SENSE– 0.6V – – SYNC DEFEAT EN + V 0.8V – + FB 4 + – SLEEP + ICOMP 50mV FREQ SHIFT EA 0.22V + BURST – COMP 1.5µA ITH 0.8V REF 1 S Q RUN/SOFT RUN/ 2 START SOFT-START RUN/SS R Q SWITCHING 7 TG UVLO LOGIC TRIP = 2.5V AND – BLANKING ANTI CIRCUIT SHOOT-THRU OVDET 0.86V + 6 BG SHUTDOWN + 10 SW 0.8V – IRCMP – 5 GND FCB + 1773 FD
Figure 2.
1773fb 5
U U U PIN FUNCTIONS ITH (Pin 1):
Error Amplifier Compensation Point. The
VFB (Pin 4):
Feedback Pin. Receives the feedback voltage current comparator threshold increases with this control from an external resistive divider across the output. Do not voltage. Nominal voltage range for this pin is 0V to 1.2V. use more than 0.01µF of feedforward capacitance from FB Under high duty cycle and nearing current limit, ITH can to the output. swing up to 2.4V.
GND (Pin 5):
Ground Pin.
RUN/SS (Pin 2):
Combination of Soft-Start and Run
BG (Pin 6):
Bottom Gate Driver of External N-Channel Control Inputs. A capacitor to ground at this pin sets the Power MOSFET. This pin swings from 0V to V ramp time to full current output. The time is approximately IN. 0.8s/µF. Forcing this pin below 0.4V shuts down all the
TG (Pin 7):
Top Gate Driver of External P-Channel Power circuitry. MOSFET. This pin swings from 0V to VIN.
SYNC/FCB (Pin 3):
Multifunction Pin. This pin performs
VIN (Pin 8) :
Main Supply Pin. Must be closely decoupled three functions: 1) secondary winding feedback input, 2) to GND (pin 5). external clock synchronization and 3) Burst Mode opera-
SENSE–(Pin 9):
The Negative Input to the Current Com- tion or forced continuous mode select. For secondary parator. A sense resistor between this pin and VIN sets the winding applications, connect to a resistive divider from peak current in the top switch. Connect this pin to the the secondary output. To synchronize with an external source of the external P-Channel power MOSFET. clock, apply a TTL/CMOS compatible clock with a fre- quency between 585kHz and 750kHz. To select Burst
SW (Pin 10):
Switch Node Connection to Inductor. This Mode operation, tie SYNC/FCB to V pin connects to the drains of the external main and IN. Grounding this pin forces continuous operation. synchronous power MOSFET switches.
U U W FUNCTIONAL DIAGRA
BURST Y Y = “0” ONLY WHEN X IS A CONSTANT “1” DEFEAT 0.4µA X SLOPE 8 V COMP IN SYNC/FCB 3 OSC 0.4V 9 SENSE– 0.6V – – SYNC DEFEAT EN + V 0.8V – + FB 4 + – SLEEP + ICOMP 50mV FREQ SHIFT EA 0.22V + BURST – COMP 1.5µA ITH 0.8V REF 1 S Q RUN/SOFT RUN/ 2 START SOFT-START RUN/SS R Q SWITCHING 7 TG UVLO LOGIC TRIP = 2.5V AND – BLANKING ANTI CIRCUIT SHOOT-THRU OVDET 0.86V + 6 BG SHUTDOWN + 10 SW 0.8V – IRCMP – 5 GND FCB + 1773 FD
Figure 2.
1773fb 5