Datasheet LTC3400-1 (Analog Devices) - 4
| 制造商 | Analog Devices |
| 描述 | 600mA, 1.2MHz Micropower Synchronous Boost Converter in ThinSOT |
| 页数 / 页 | 12 / 4 — PI FU CTIO S. SW (Pin 1):. GND (Pin 2):. OUT (Pin 5):. FB (Pin 3):. VIN … |
| 文件格式/大小 | PDF / 302 Kb |
| 文件语言 | 英语 |
PI FU CTIO S. SW (Pin 1):. GND (Pin 2):. OUT (Pin 5):. FB (Pin 3):. VIN (Pin 6):. SHDN (Pin 4):. BLOCK DIAGRA
该数据表的模型线
文件文字版本
LTC3400-1
U U U PI FU CTIO S SW (Pin 1):
Switch Pin. Connect inductor between SW SHDN = Low: Shutdown, quiescent current < 1µA. and VIN. Optional Schottky diode is connected between 100Ω connected between SW and VIN. VIN is connected SW and VOUT. Keep these PCB trace lengths as short and to VOUT through the internal P-channel MOSFET syn- wide as possible to reduce EMI and voltage overshoot. If chronous rectifier and external inductor. the inductor current falls to zero, or SHDN is low, an Typically, SHDN should be connected to V internal 100Ω antiringing switch is connected from SW to IN through a 1M pull-up resistor. VIN to minimize EMI.
V GND (Pin 2):
Signal and Power Ground. Provide a short
OUT (Pin 5):
Output Voltage Sense Input and Drain of the Internal Synchronous Rectifier MOSFET. Bias is derived direct PCB path between GND and the (–) side of the output from V capacitor(s). OUT. PCB trace length from VOUT to the output filter capacitor(s) should be as short and wide as possible. VOUT
FB (Pin 3):
Feedback Input to the gm Error Amplifier. is connected to VIN in shutdown through the internal Connect resistor divider tap to this pin. The output voltage P-channel MOSFET synchronous rectifier. can be adjusted from 2.5V to 5V by:
VIN (Pin 6):
Battery Input Voltage. The device gets its VOUT = 1.23V • [1 + (R1/R2)] start-up bias from VIN. Once VOUT exceeds VIN, bias comes from V
SHDN (Pin 4):
Logic Controlled Shutdown Input. OUT. Thus, once started, operation is com- pletely independent from VIN. Operation is only limited by SHDN = High: Normal free running operation, 1.2MHz the output power level and the battery’s internal series typical operating frequency. resistance.
W BLOCK DIAGRA
L1 4.7µH SINGLE + C 6 V IN CELL IN 1 SW 1µF OPTIONAL + INPUT SCHOTTKY VOUT GOOD – 2.3V START-UP A A/B OSC 3.3V MUX VOUT 0.45 OUTPUT B Ω 5 SYNC PWM DRIVE CONTROL SHUTDOWN CONTROL 0.35Ω R1 RAMP C 1.02M FF CURRENT GEN (OPTIONAL) 1% SLOPE Σ SENSE 1.2MHz (EXTERNAL) COMP PWM COMPARATOR + FB – – C 3 OUT g – 4.7µF m ERROR AMP + 1.23V RC REF 80k CP2 R2 Burst Mode 2.5pF 604k SLEEP OPERATION CC 1% CONTROL 150pF (EXTERNAL) SHDN SHUTDOWN 2 GND 4 SHUTDOWN CONTROL 34001 BD 34001f 4
U U U PI FU CTIO S SW (Pin 1):
Switch Pin. Connect inductor between SW SHDN = Low: Shutdown, quiescent current < 1µA. and VIN. Optional Schottky diode is connected between 100Ω connected between SW and VIN. VIN is connected SW and VOUT. Keep these PCB trace lengths as short and to VOUT through the internal P-channel MOSFET syn- wide as possible to reduce EMI and voltage overshoot. If chronous rectifier and external inductor. the inductor current falls to zero, or SHDN is low, an Typically, SHDN should be connected to V internal 100Ω antiringing switch is connected from SW to IN through a 1M pull-up resistor. VIN to minimize EMI.
V GND (Pin 2):
Signal and Power Ground. Provide a short
OUT (Pin 5):
Output Voltage Sense Input and Drain of the Internal Synchronous Rectifier MOSFET. Bias is derived direct PCB path between GND and the (–) side of the output from V capacitor(s). OUT. PCB trace length from VOUT to the output filter capacitor(s) should be as short and wide as possible. VOUT
FB (Pin 3):
Feedback Input to the gm Error Amplifier. is connected to VIN in shutdown through the internal Connect resistor divider tap to this pin. The output voltage P-channel MOSFET synchronous rectifier. can be adjusted from 2.5V to 5V by:
VIN (Pin 6):
Battery Input Voltage. The device gets its VOUT = 1.23V • [1 + (R1/R2)] start-up bias from VIN. Once VOUT exceeds VIN, bias comes from V
SHDN (Pin 4):
Logic Controlled Shutdown Input. OUT. Thus, once started, operation is com- pletely independent from VIN. Operation is only limited by SHDN = High: Normal free running operation, 1.2MHz the output power level and the battery’s internal series typical operating frequency. resistance.
W BLOCK DIAGRA
L1 4.7µH SINGLE + C 6 V IN CELL IN 1 SW 1µF OPTIONAL + INPUT SCHOTTKY VOUT GOOD – 2.3V START-UP A A/B OSC 3.3V MUX VOUT 0.45 OUTPUT B Ω 5 SYNC PWM DRIVE CONTROL SHUTDOWN CONTROL 0.35Ω R1 RAMP C 1.02M FF CURRENT GEN (OPTIONAL) 1% SLOPE Σ SENSE 1.2MHz (EXTERNAL) COMP PWM COMPARATOR + FB – – C 3 OUT g – 4.7µF m ERROR AMP + 1.23V RC REF 80k CP2 R2 Burst Mode 2.5pF 604k SLEEP OPERATION CC 1% CONTROL 150pF (EXTERNAL) SHDN SHUTDOWN 2 GND 4 SHUTDOWN CONTROL 34001 BD 34001f 4